_(0x06, 0x1a, "Nehalem", "Nehalem EP,Bloomfield)") \
_(0x06, 0x17, "Penryn", "Yorkfield,Wolfdale,Penryn,Harpertown")
+/* _(implementor-id, part-id, vendor-name, cpu-name, show CPU pass as string) */
#define foreach_aarch64_cpu_uarch \
- _(0x41, 0xd03, "ARM", "Cortex-A53") \
- _(0x41, 0xd07, "ARM", "Cortex-A57") \
- _(0x41, 0xd08, "ARM", "Cortex-A72") \
- _(0x41, 0xd09, "ARM", "Cortex-A73") \
- _(0x43, 0x0a1, "Cavium", "ThunderX CN88XX") \
- _(0x43, 0x0a2, "Cavium", "Octeon TX CN81XX") \
- _(0x43, 0x0a3, "Cavium", "Octeon TX CN83XX") \
- _(0x43, 0x0af, "Cavium", "ThunderX2 CN99XX") \
- _(0x43, 0x0b1, "Cavium", "Octeon TX2 CN98XX") \
- _(0x43, 0x0b2, "Cavium", "Octeon TX2 CN93XX") \
+ _(0x41, 0xd03, "ARM", "Cortex-A53", 0) \
+ _(0x41, 0xd07, "ARM", "Cortex-A57", 0) \
+ _(0x41, 0xd08, "ARM", "Cortex-A72", 0) \
+ _(0x41, 0xd09, "ARM", "Cortex-A73", 0) \
+ _(0x43, 0x0a1, "Marvell", "THUNDERX CN88XX", 0) \
+ _(0x43, 0x0a2, "Marvell", "OCTEON TX CN81XX", 0) \
+ _(0x43, 0x0a3, "Marvell", "OCTEON TX CN83XX", 0) \
+ _(0x43, 0x0af, "Marvell", "THUNDERX2 CN99XX", 1) \
+ _(0x43, 0x0b1, "Marvell", "OCTEON TX2 CN98XX", 1) \
+ _(0x43, 0x0b2, "Marvell", "OCTEON TX2 CN96XX", 1)
u8 *
format_cpu_uarch (u8 * s, va_list * args)
{
#if __x86_64__
u32 __attribute__ ((unused)) eax, ebx, ecx, edx;
- u8 model, family;
+ u8 model, family, stepping;
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx) == 0)
return format (s, "unknown (missing cpuid)");
model = ((eax >> 4) & 0x0f) | ((eax >> 12) & 0xf0);
family = (eax >> 8) & 0x0f;
+ stepping = eax & 0x0f;
-#define _(f,m,a,c) if ((model == m) && (family == f)) return format(s, "%s (%s)", a, c);
+#define _(f,m,a,c) if ((model == m) && (family == f)) return \
+format(s, "[0x%x] %s ([0x%02x] %s) stepping 0x%x", f, a, m, c, stepping);
foreach_x86_cpu_uarch
#undef _
return format (s, "unknown (family 0x%02x model 0x%02x)", family, model);
unformat_free (&input);
close (fd);
- /* Note: Cavium starts counting variants from 1 instead of 0 */
- if (implementer == 0x43)
- variant++;
+#define _(i,p,a,c,_format) if ((implementer == i) && (primary_part_number == p)){ \
+ if (_format)\
+ return format(s, "%s (%s PASS %c%u)", a, c, 'A'+variant, revision);\
+ else {\
+ if (implementer == 0x43)\
+ variant++; \
+ return format (s, "%s (%s PASS %u.%u)", a, c, variant, revision);}}
-#define _(i,p,a,c) if ((implementer == i) && (primary_part_number == p)) \
- return format(s, "%s (%s PASS %u.%u)", a, c, variant, revision);
foreach_aarch64_cpu_uarch
#undef _
return format (s, "unknown (implementer 0x%02x part 0x%03x PASS %u.%u)",
static inline char const *
-flag_skip_prefix (char const *flag)
+flag_skip_prefix (char const *flag, const char *pfx, int len)
{
- if (memcmp (flag, "x86_", sizeof ("x86_") - 1) == 0)
- return flag + sizeof ("x86_") - 1;
- if (memcmp (flag, "aarch64_", sizeof ("aarch64_") - 1) == 0)
- return flag + sizeof ("aarch64_") - 1;
+ if (0 == strncmp (flag, pfx, len - 1))
+ return flag + len - 1;
return flag;
}
#if defined(__x86_64__)
#define _(flag, func, reg, bit) \
if (clib_cpu_supports_ ## flag()) \
- s = format (s, "%s ", flag_skip_prefix(#flag));
+ s = format (s, "%s ", flag_skip_prefix(#flag, "x86_", sizeof("x86_")));
foreach_x86_64_flags return s;
#undef _
#elif defined(__aarch64__)
#define _(flag, bit) \
if (clib_cpu_supports_ ## flag()) \
- s = format (s, "%s ", flag_skip_prefix(#flag));
+ s = format (s, "%s ", flag_skip_prefix(#flag, "aarch64_", sizeof("aarch64_")));
foreach_aarch64_flags return s;
#undef _
#else /* ! ! __x86_64__ && ! __aarch64__ */