_(0x41, 0xd07, "ARM", "Cortex-A57", 0) \
_(0x41, 0xd08, "ARM", "Cortex-A72", 0) \
_(0x41, 0xd09, "ARM", "Cortex-A73", 0) \
+ _(0x41, 0xd0a, "ARM", "Cortex-A75", 0) \
+ _(0x41, 0xd0b, "ARM", "Cortex-A76", 0) \
+ _(0x41, 0xd0c, "ARM", "Neoverse-N1", 0) \
+ _(0x41, 0xd4a, "ARM", "Neoverse-E1", 0) \
_(0x43, 0x0a1, "Marvell", "THUNDERX CN88XX", 0) \
_(0x43, 0x0a2, "Marvell", "OCTEON TX CN81XX", 0) \
_(0x43, 0x0a3, "Marvell", "OCTEON TX CN83XX", 0) \
_(0x43, 0x0b1, "Marvell", "OCTEON TX2 CN98XX", 1) \
_(0x43, 0x0b2, "Marvell", "OCTEON TX2 CN96XX", 1)
-u8 *
+__clib_export u8 *
format_cpu_uarch (u8 * s, va_list * args)
{
#if __x86_64__
#endif
}
-u8 *
+__clib_export u8 *
format_cpu_model_name (u8 * s, va_list * args)
{
#if __x86_64__
return flag;
}
-u8 *
+__clib_export u8 *
format_cpu_flags (u8 * s, va_list * args)
{
#if defined(__x86_64__)