_ (hsw, "Intel Haswell") \
_ (trm, "Intel Tremont") \
_ (skx, "Intel Skylake (server) / Cascade Lake") \
- _ (icl, "Intel Ice Lake")
+ _ (icl, "Intel Ice Lake") \
+ _ (adl, "Intel Alder Lake") \
+ _ (spr, "Intel Sapphire Rapids")
#elif defined(__aarch64__)
#define foreach_march_variant \
_ (octeontx2, "Marvell Octeon TX2") \
_ (avx512_vpopcntdq, 7, ecx, 14) \
_ (movdiri, 7, ecx, 27) \
_ (movdir64b, 7, ecx, 28) \
+ _ (enqcmd, 7, ecx, 29) \
_ (avx512_fp16, 7, edx, 23) \
_ (invariant_tsc, 0x80000007, edx, 8)
_ (sha512, 21) \
_ (sve, 22)
-u32 clib_get_current_cpu_id ();
-u32 clib_get_current_numa_node ();
+u32 clib_get_current_cpu_id (void);
+u32 clib_get_current_numa_node (void);
-typedef int (*clib_cpu_supports_func_t) ();
+typedef int (*clib_cpu_supports_func_t) (void);
#if defined(__x86_64__)
#include "cpuid.h"
#endif
}
+static inline int
+clib_cpu_march_priority_spr ()
+{
+ if (clib_cpu_supports_enqcmd ())
+ return 300;
+ return -1;
+}
+
static inline int
clib_cpu_march_priority_icl ()
{
return -1;
}
+static inline int
+clib_cpu_march_priority_adl ()
+{
+ if (clib_cpu_supports_movdiri () && clib_cpu_supports_avx2 ())
+ return 150;
+ return -1;
+}
+
static inline int
clib_cpu_march_priority_skx ()
{
clib_cpu_march_priority_trm ()
{
if (clib_cpu_supports_movdiri ())
- return 60;
+ return 40;
return -1;
}