#if __x86_64__
#define CLIB_PAUSE() __builtin_ia32_pause ()
+#elif defined (__aarch64__) || defined (__arm__)
+#define CLIB_PAUSE() __asm__ ("yield")
#else
#define CLIB_PAUSE()
#endif
#define CLIB_SPINLOCK_IS_LOCKED(_p) (*(_p))->lock
#define CLIB_SPINLOCK_ASSERT_LOCKED(_p) ASSERT(CLIB_SPINLOCK_IS_LOCKED((_p)))
-typedef struct
+struct clib_spinlock_s
{
CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
u32 lock;
uword thread_index;
void *frame_address;
#endif
-} *clib_spinlock_t;
+};
+
+typedef struct clib_spinlock_s *clib_spinlock_t;
static inline void
clib_spinlock_init (clib_spinlock_t * p)
CLIB_LOCK_DBG (p);
}
+static_always_inline int
+clib_spinlock_trylock (clib_spinlock_t * p)
+{
+ if (PREDICT_FALSE (CLIB_SPINLOCK_IS_LOCKED (p)))
+ return 0;
+ clib_spinlock_lock (p);
+ return 1;
+}
+
static_always_inline void
clib_spinlock_lock_if_init (clib_spinlock_t * p)
{
clib_spinlock_lock (p);
}
+static_always_inline int
+clib_spinlock_trylock_if_init (clib_spinlock_t * p)
+{
+ if (PREDICT_FALSE (*p != 0))
+ return clib_spinlock_trylock (p);
+ return 1;
+}
+
static_always_inline void
clib_spinlock_unlock (clib_spinlock_t * p)
{
typedef struct clib_rw_lock_
{
CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
- volatile u32 n_readers;
- volatile u32 n_readers_lock;
- volatile u32 writer_lock;
+ /* -1 when W lock held, > 0 when R lock held */
+ volatile i32 rw_cnt;
#if CLIB_DEBUG > 0
pid_t pid;
uword thread_index;
always_inline void
clib_rwlock_reader_lock (clib_rwlock_t * p)
{
- while (clib_atomic_test_and_set (&(*p)->n_readers_lock))
- CLIB_PAUSE ();
-
- (*p)->n_readers += 1;
- if ((*p)->n_readers == 1)
+ i32 cnt;
+ do
{
- while (clib_atomic_test_and_set (&(*p)->writer_lock))
+ /* rwlock held by a writer */
+ while ((cnt = clib_atomic_load_relax_n (&(*p)->rw_cnt)) < 0)
CLIB_PAUSE ();
}
- clib_atomic_release (&(*p)->n_readers_lock);
+ while (!clib_atomic_cmp_and_swap_acq_relax_n
+ (&(*p)->rw_cnt, &cnt, cnt + 1, 1));
CLIB_LOCK_DBG (p);
}
always_inline void
clib_rwlock_reader_unlock (clib_rwlock_t * p)
{
- ASSERT ((*p)->n_readers > 0);
+ ASSERT ((*p)->rw_cnt > 0);
CLIB_LOCK_DBG_CLEAR (p);
-
- while (clib_atomic_test_and_set (&(*p)->n_readers_lock))
- CLIB_PAUSE ();
-
- (*p)->n_readers -= 1;
- if ((*p)->n_readers == 0)
- {
- clib_atomic_release (&(*p)->writer_lock);
- }
- clib_atomic_release (&(*p)->n_readers_lock);
+ clib_atomic_fetch_sub_rel (&(*p)->rw_cnt, 1);
}
always_inline void
clib_rwlock_writer_lock (clib_rwlock_t * p)
{
- while (clib_atomic_test_and_set (&(*p)->writer_lock))
- CLIB_PAUSE ();
+ i32 cnt = 0;
+ do
+ {
+ /* rwlock held by writer or reader(s) */
+ while ((cnt = clib_atomic_load_relax_n (&(*p)->rw_cnt)) != 0)
+ CLIB_PAUSE ();
+ }
+ while (!clib_atomic_cmp_and_swap_acq_relax_n (&(*p)->rw_cnt, &cnt, -1, 1));
CLIB_LOCK_DBG (p);
}
clib_rwlock_writer_unlock (clib_rwlock_t * p)
{
CLIB_LOCK_DBG_CLEAR (p);
- clib_atomic_release (&(*p)->writer_lock);
+ clib_atomic_release (&(*p)->rw_cnt);
}
#endif