VPP-327 Coding standards cleanup for vppinfra

[vpp.git] / vppinfra / vppinfra / vector_altivec.h

diff --git a/vppinfra/vppinfra/vector_altivec.h b/vppinfra/vppinfra/vector_altivec.h
index cc4f28a..0e9de82 100644 (file)
--- a/vppinfra/vppinfra/vector_altivec.h
+++ b/vppinfra/vppinfra/vector_altivec.h
@@ -69,16 +69,16 @@
     return t##_##lr (x, j);                                    \
   }
 
-_ (u16x8, i16x8, shift_left, vslh);
-_ (u32x4, i32x4, shift_left, vslw);
-_ (u16x8, i16x8, shift_right, vsrh);
-_ (u32x4, i32x4, shift_right, vsrw);
-_ (i16x8, i16x8, shift_right, vsrah);
-_ (i32x4, i32x4, shift_right, vsraw);
-_ (u16x8, i16x8, rotate_left, vrlh);
-_ (i16x8, i16x8, rotate_left, vrlh);
-_ (u32x4, i32x4, rotate_left, vrlw);
-_ (i32x4, i32x4, rotate_left, vrlw);
+_(u16x8, i16x8, shift_left, vslh);
+_(u32x4, i32x4, shift_left, vslw);
+_(u16x8, i16x8, shift_right, vsrh);
+_(u32x4, i32x4, shift_right, vsrw);
+_(i16x8, i16x8, shift_right, vsrah);
+_(i32x4, i32x4, shift_right, vsraw);
+_(u16x8, i16x8, rotate_left, vrlh);
+_(i16x8, i16x8, rotate_left, vrlh);
+_(u32x4, i32x4, rotate_left, vrlw);
+_(i32x4, i32x4, rotate_left, vrlw);
 
 #undef _
 
@@ -89,19 +89,17 @@ _ (i32x4, i32x4, rotate_left, vrlw);
     return (t) __builtin_altivec_##f ((i32x4) x, n_bits);      \
   }
 
-_ (u32x4, u32, left, vslo)
-_ (i32x4, i32, left, vslo)
-_ (u32x4, u32, right, vsro)
-_ (i32x4, i32, right, vsro)
-_ (u16x8, u16, left, vslo)
-_ (i16x8, i16, left, vslo)
-_ (u16x8, u16, right, vsro)
-_ (i16x8, i16, right, vsro)
-
+_(u32x4, u32, left, vslo)
+_(i32x4, i32, left, vslo)
+_(u32x4, u32, right, vsro)
+_(i32x4, i32, right, vsro)
+_(u16x8, u16, left, vslo)
+_(i16x8, i16, left, vslo)
+_(u16x8, u16, right, vsro) _(i16x8, i16, right, vsro)
 #undef _
-
-always_inline u32
-u32x4_get0 (u32x4 x)
+     always_inline
+       u32
+     u32x4_get0 (u32x4 x)
 {
   u32x4_union_t y;
   y.as_u32x4 = x;
@@ -113,17 +111,14 @@ u32x4_get0 (u32x4 x)
   always_inline t t##_interleave_##lh (t x, t y)               \
   { return (t) __builtin_altivec_##f ((it) x, (it) y); }
 
-_ (u32x4, i32x4, lo, vmrglw)
-_ (i32x4, i32x4, lo, vmrglw)
-_ (u16x8, i16x8, lo, vmrglh)
-_ (i16x8, i16x8, lo, vmrglh)
-_ (u32x4, i32x4, hi, vmrghw)
-_ (i32x4, i32x4, hi, vmrghw)
-_ (u16x8, i16x8, hi, vmrghh)
-_ (i16x8, i16x8, hi, vmrghh)
-
+_(u32x4, i32x4, lo, vmrglw)
+_(i32x4, i32x4, lo, vmrglw)
+_(u16x8, i16x8, lo, vmrglh)
+_(i16x8, i16x8, lo, vmrglh)
+_(u32x4, i32x4, hi, vmrghw)
+_(i32x4, i32x4, hi, vmrghw)
+_(u16x8, i16x8, hi, vmrghh) _(i16x8, i16x8, hi, vmrghh)
 #undef _
-
 /* Unaligned loads/stores. */
 #ifndef __cplusplus
 #define _(t)                                           \
@@ -131,19 +126,9 @@ _ (i16x8, i16x8, hi, vmrghh)
   { clib_mem_unaligned (a, t) = x; }                   \
   always_inline t t##_load_unaligned (t * a)           \
   { return clib_mem_unaligned (a, t); }
-
-_ (u8x16)
-_ (u16x8)
-_ (u32x4)
-_ (u64x2)
-_ (i8x16)
-_ (i16x8)
-_ (i32x4)
-_ (i64x2)
-
+  _(u8x16) _(u16x8) _(u32x4) _(u64x2) _(i8x16) _(i16x8) _(i32x4) _(i64x2)
 #undef _
 #endif
-
 #define _signed_binop(n,m,f,g)                                         \
   /* Unsigned */                                                       \
   always_inline u##n##x##m                                             \
@@ -154,26 +139,25 @@ _ (i64x2)
   always_inline i##n##x##m                                             \
   i##n##x##m##_##f (i##n##x##m x, i##n##x##m y)                                \
   { return (i##n##x##m) __builtin_altivec_##g ((i##n##x##m) x, (i##n##x##m) y); }
-
 /* Compare operations. */
-_signed_binop (16, 8, is_equal, vcmpequh)
+  _signed_binop (16, 8, is_equal, vcmpequh)
 _signed_binop (32, 4, is_equal, vcmpequw)
-
 #undef _signed_binop
-
-always_inline u16x8 u16x8_is_zero (u16x8 x)
+     always_inline u16x8 u16x8_is_zero (u16x8 x)
 {
-  u16x8 zero = {0};
+  u16x8 zero = { 0 };
   return u16x8_is_equal (x, zero);
 }
 
-always_inline u32x4 u32x4_is_zero (u32x4 x)
+always_inline u32x4
+u32x4_is_zero (u32x4 x)
 {
-  u32x4 zero = {0};
+  u32x4 zero = { 0 };
   return u32x4_is_equal (x, zero);
 }
 
-always_inline u32 u32x4_zero_byte_mask (u32x4 x)
+always_inline u32
+u32x4_zero_byte_mask (u32x4 x)
 {
   u32x4 cmp = u32x4_is_zero (x);
   u32x4 tmp = { 0x000f, 0x00f0, 0x0f00, 0xf000, };
@@ -184,3 +168,11 @@ always_inline u32 u32x4_zero_byte_mask (u32x4 x)
 }
 
 #endif /* included_vector_altivec_h */
+
+/*
+ * fd.io coding-style-patch-verification: ON
+ *
+ * Local Variables:
+ * eval: (c-set-style "gnu")
+ * End:
+ */