X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;ds=sidebyside;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fipsec.rst;h=184e04ab55ce60c247c7e506a216a211b9563c34;hb=c2d12bb8aefc1b5dc856d2278d7ea81321f74c8f;hp=0965f0a58ebb16dd2f3b881e514422a0b1ed4aa8;hpb=dfff0ee80f3912a6db3f4356254f4cb3e3a9450d;p=csit.git diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst index 0965f0a58e..184e04ab55 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst @@ -17,8 +17,12 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: - ipsec-3n-hsw-xl710 + ipsec-3n-icx-xxv710 + ipsec-3n-alt-xl710 + ipsec-3n-tsh-x520 + ipsec-2n-tx2-xl710 + ipsec-3n-dnv-x553