X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Fphysical_testbeds.rst;h=343e4b3010b14bfc91e2583844b451e3e2ab041e;hb=refs%2Fchanges%2F95%2F37095%2F2;hp=9bb0a05f994d19a7265c4062c9890516df5d3c9a;hpb=ed72f828240f6184b38c38f8ccd078308c9cdfb9;p=csit.git

diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst
index 9bb0a05f99..343e4b3010 100644
--- a/docs/report/introduction/physical_testbeds.rst
+++ b/docs/report/introduction/physical_testbeds.rst
@@ -160,6 +160,8 @@ TG NICs:
 All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled,
 doubling the number of logical cores exposed to Linux.
 
+.. _physical_testbeds_2n_icx:
+
 2-Node Xeon Icelake (2n-icx)
 ----------------------------
 
@@ -193,6 +195,8 @@ SUT and TG NICs:
 All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled,
 doubling the number of logical cores exposed to Linux.
 
+.. _physical_testbeds_3n_icx:
+
 3-Node Xeon Icelake (3n-icx)
 ----------------------------
 
@@ -226,100 +230,6 @@ SUT and TG NICs:
 All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled,
 doubling the number of logical cores exposed to Linux.
 
-2-Node Xeon Skylake (2n-skx)
-----------------------------
-
-Four 2n-skx testbeds are in operation in FD.io labs. Each 2n-skx testbed
-is built with two SuperMicro SYS-7049GP-TRT servers, each in turn
-equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB
-Cache, 2.50 GHz, 28 cores). 2n-skx physical topology is shown below.
-
-.. only:: latex
-
-    .. raw:: latex
-
-        \begin{figure}[H]
-            \centering
-                \graphicspath{{../_tmp/src/introduction/}}
-                \includegraphics[width=0.90\textwidth]{testbed-2n-skx}
-                \label{fig:testbed-2n-skx}
-        \end{figure}
-
-.. only:: html
-
-    .. figure:: testbed-2n-skx.svg
-        :alt: testbed-2n-skx
-        :align: center
-
-SUT NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: empty, future expansion.
-
-TG NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.)
-
-All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled,
-doubling the number of logical cores exposed to Linux, with 56 logical
-cores and 28 physical cores per processor socket.
-
-3-Node Xeon Skylake (3n-skx)
-----------------------------
-
-Two 3n-skx testbeds are in operation in FD.io labs. Each 3n-skx testbed
-is built with three SuperMicro SYS-7049GP-TRT servers, each in turn
-equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB
-Cache, 2.50 GHz, 28 cores). 3n-skx physical topology is shown below.
-
-.. only:: latex
-
-    .. raw:: latex
-
-        \begin{figure}[H]
-            \centering
-                \graphicspath{{../_tmp/src/introduction/}}
-                \includegraphics[width=0.90\textwidth]{testbed-3n-skx}
-                \label{fig:testbed-3n-skx}
-        \end{figure}
-
-.. only:: html
-
-    .. figure:: testbed-3n-skx.svg
-        :alt: testbed-3n-skx
-        :align: center
-
-SUT1 and SUT2 NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: empty, future expansion.
-
-TG NICs:
-
-#. NIC-1: x710-DA4 4p10GE Intel.
-#. NIC-2: xxv710-DA2 2p25GE Intel.
-#. NIC-3: empty, future expansion.
-#. NIC-4: empty, future expansion.
-#. NIC-5: empty, future expansion.
-#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.)
-
-All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled,
-doubling the number of logical cores exposed to Linux, with 56 logical
-cores and 28 physical cores per processor socket.
-
 2-Node Atom Denverton (2n-dnv)
 ------------------------------
 
@@ -398,6 +308,45 @@ TG NICs:
 
 #. NIC-1: x710-DA4 4p10GE Intel.
 
+.. _physical_testbeds_3n_alt:
+
+3-Node ARM Altra (3n-alt)
+---------------------------
+
+One 3n-tsh testbed is built with: i) one SuperMicro SYS-740GP-TNRT
+server acting as TG and equipped with two Intel Xeon Icelake Platinum
+8358 processors (80 MB Cache, 2.60 GHz, 32 cores), and ii) one Ampere
+Altra server acting as SUT and equipped with two Q80-30 processors
+(80* ARM Neoverse N1). 3n-alt physical topology is shown below.
+
+.. only:: latex
+
+    .. raw:: latex
+
+        \begin{figure}[H]
+            \centering
+                \graphicspath{{../_tmp/src/introduction/}}
+                \includegraphics[width=0.90\textwidth]{testbed-3n-alt}
+                \label{fig:testbed-3n-alt}
+        \end{figure}
+
+.. only:: html
+
+    .. figure:: testbed-3n-alt.svg
+        :alt: testbed-3n-alt
+        :align: center
+
+SUT1 and SUT2 NICs:
+
+#. NIC-1: xl710-QDA2-2p40GE Intel.
+
+TG NICs:
+
+#. NIC-1: xxv710-DA2-2p25GE Intel.
+#. NIC-2: xl710-QDA2-2p40GE Intel.
+#. NIC-3: e810-XXVDA4-4p25GE Intel.
+#. NIC-4: e810-2CQDA2-2p100GE Intel.
+
 3-Node ARM TaiShan (3n-tsh)
 ---------------------------