X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Fphysical_testbeds.rst;h=5a9b1edf97158826dbb84f1f4e6f679777dccee7;hb=46eac7bb697e8261dba5b439a15f5a6125f31760;hp=9bb0a05f994d19a7265c4062c9890516df5d3c9a;hpb=ed72f828240f6184b38c38f8ccd078308c9cdfb9;p=csit.git diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 9bb0a05f99..5a9b1edf97 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -26,9 +26,9 @@ Two physical server topology types are used: Current FD.io production testbeds are built with SUT servers based on the following processor architectures: -- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, Icelake 8358. -- Intel Atom: Denverton C3858. -- Arm: TaiShan 2280, hip07-d05. +- Intel Xeon: Cascadelake 6252N, Icelake 8358. +- Intel Atom: Denverton C3858, Snowridge P5362. +- Arm: TaiShan 2280, hip07-d05, Neoverse N1. - AMD EPYC: Zen2 7532. Server SUT performance depends on server and processor type, hence @@ -56,6 +56,13 @@ VPP is performance tested on SUTs with the following NICs and drivers: - DPDK PMD. - AVF in PMD mode. - AF_XDP in PMD mode. +#. 4p25GE: xxv710-DA4 Intel (codename Fortville, FVL) + - DPDK PMD. + - AVF in PMD mode. + - AF_XDP in PMD mode. +#. 4p25GE: E822-CQDA4 Intel (codename Columbiaville, CVL) + - DPDK PMD. + - AVF in PMD mode. #. 2p100GE: cx556a-edat Mellanox ConnectX5 - RDMA_core in PMD mode. #. 2p100GE: E810-2CQDA2 Intel (codename Columbiaville, CVL) @@ -73,6 +80,8 @@ running on TGs and using Linux drivers for all NICs. For more information see :ref:`vpp_test_environment` and :ref:`dpdk_test_environment`. +.. _physical_testbeds_2n_zn2: + 2-Node AMD EPYC Zen2 (2n-zn2) ----------------------------- @@ -113,6 +122,8 @@ TG NICs: All AMD EPYC Zen2 7532 servers run with AMD SMT enabled, doubling the number of logical cores exposed to Linux. +.. _physical_testbeds_2n_clx: + 2-Node Xeon Cascadelake (2n-clx) -------------------------------- @@ -160,6 +171,8 @@ TG NICs: All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. +.. _physical_testbeds_2n_icx: + 2-Node Xeon Icelake (2n-icx) ---------------------------- @@ -193,6 +206,8 @@ SUT and TG NICs: All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. +.. _physical_testbeds_3n_icx: + 3-Node Xeon Icelake (3n-icx) ---------------------------- @@ -226,60 +241,16 @@ SUT and TG NICs: All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. -2-Node Xeon Skylake (2n-skx) ----------------------------- - -Four 2n-skx testbeds are in operation in FD.io labs. Each 2n-skx testbed -is built with two SuperMicro SYS-7049GP-TRT servers, each in turn -equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB -Cache, 2.50 GHz, 28 cores). 2n-skx physical topology is shown below. - -.. only:: latex - - .. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_tmp/src/introduction/}} - \includegraphics[width=0.90\textwidth]{testbed-2n-skx} - \label{fig:testbed-2n-skx} - \end{figure} - -.. only:: html - - .. figure:: testbed-2n-skx.svg - :alt: testbed-2n-skx - :align: center - -SUT NICs: - -#. NIC-1: x710-DA4 4p10GE Intel. -#. NIC-2: xxv710-DA2 2p25GE Intel. -#. NIC-3: empty, future expansion. -#. NIC-4: empty, future expansion. -#. NIC-5: empty, future expansion. -#. NIC-6: empty, future expansion. - -TG NICs: - -#. NIC-1: x710-DA4 4p10GE Intel. -#. NIC-2: xxv710-DA2 2p25GE Intel. -#. NIC-3: empty, future expansion. -#. NIC-4: empty, future expansion. -#. NIC-5: empty, future expansion. -#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.) - -All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled, -doubling the number of logical cores exposed to Linux, with 56 logical -cores and 28 physical cores per processor socket. +.. _physical_testbeds_3n_alt: -3-Node Xeon Skylake (3n-skx) ----------------------------- +3-Node ARM Altra (3n-alt) +--------------------------- -Two 3n-skx testbeds are in operation in FD.io labs. Each 3n-skx testbed -is built with three SuperMicro SYS-7049GP-TRT servers, each in turn -equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 MB -Cache, 2.50 GHz, 28 cores). 3n-skx physical topology is shown below. +One 3n-tsh testbed is built with: i) one SuperMicro SYS-740GP-TNRT +server acting as TG and equipped with two Intel Xeon Icelake Platinum +8358 processors (80 MB Cache, 2.60 GHz, 32 cores), and ii) one Ampere +Altra server acting as SUT and equipped with two Q80-30 processors +(80* ARM Neoverse N1). 3n-alt physical topology is shown below. .. only:: latex @@ -288,115 +259,28 @@ Cache, 2.50 GHz, 28 cores). 3n-skx physical topology is shown below. \begin{figure}[H] \centering \graphicspath{{../_tmp/src/introduction/}} - \includegraphics[width=0.90\textwidth]{testbed-3n-skx} - \label{fig:testbed-3n-skx} + \includegraphics[width=0.90\textwidth]{testbed-3n-alt} + \label{fig:testbed-3n-alt} \end{figure} .. only:: html - .. figure:: testbed-3n-skx.svg - :alt: testbed-3n-skx + .. figure:: testbed-3n-alt.svg + :alt: testbed-3n-alt :align: center SUT1 and SUT2 NICs: -#. NIC-1: x710-DA4 4p10GE Intel. -#. NIC-2: xxv710-DA2 2p25GE Intel. -#. NIC-3: empty, future expansion. -#. NIC-4: empty, future expansion. -#. NIC-5: empty, future expansion. -#. NIC-6: empty, future expansion. +#. NIC-1: xl710-QDA2-2p40GE Intel. TG NICs: -#. NIC-1: x710-DA4 4p10GE Intel. -#. NIC-2: xxv710-DA2 2p25GE Intel. -#. NIC-3: empty, future expansion. -#. NIC-4: empty, future expansion. -#. NIC-5: empty, future expansion. -#. NIC-6: x710-DA4 4p10GE Intel. (For self-tests.) - -All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled, -doubling the number of logical cores exposed to Linux, with 56 logical -cores and 28 physical cores per processor socket. +#. NIC-1: xxv710-DA2-2p25GE Intel. +#. NIC-2: xl710-QDA2-2p40GE Intel. +#. NIC-3: e810-XXVDA4-4p25GE Intel. +#. NIC-4: e810-2CQDA2-2p100GE Intel. -2-Node Atom Denverton (2n-dnv) ------------------------------- - -2n-dnv testbed is built with: i) one Intel S2600WFT server acting as TG -and equipped with two Intel Xeon Skylake Platinum 8180 processors (38.5 -MB Cache, 2.50 GHz, 28 cores), and ii) one SuperMicro SYS-E300-9A server -acting as SUT and equipped with one Intel Atom C3858 processor (12 MB -Cache, 2.00 GHz, 12 cores). 2n-dnv physical topology is shown below. - -.. only:: latex - - .. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_tmp/src/introduction/}} - \includegraphics[width=0.90\textwidth]{testbed-2n-dnv} - \label{fig:testbed-2n-dnv} - \end{figure} - -.. only:: html - - .. figure:: testbed-2n-dnv.svg - :alt: testbed-2n-dnv - :align: center - -SUT 10GE NIC ports: - -#. P-1: x553 copper port. -#. P-2: x553 copper port. -#. P-3: x553 fiber port. -#. P-4: x553 fiber port. - -TG NICs: - -#. NIC-1: x550-T2 2p10GE Intel. -#. NIC-2: x550-T2 2p10GE Intel. -#. NIC-3: x520-DA2 2p10GE Intel. -#. NIC-4: x520-DA2 2p10GE Intel. - -The 2n-dnv testbed is in operation in Intel SH labs. - -3-Node Atom Denverton (3n-dnv) ------------------------------- - -One 3n-dnv testbed is built with: i) one SuperMicro SYS-7049GP-TRT -server acting as TG and equipped with two Intel Xeon Skylake Platinum -8180 processors (38.5 MB Cache, 2.50 GHz, 28 cores), and ii) one -SuperMicro SYS-E300-9A server acting as SUT and equipped with one Intel -Atom C3858 processor (12 MB Cache, 2.00 GHz, 12 cores). 3n-dnv physical -topology is shown below. - -.. only:: latex - - .. raw:: latex - - \begin{figure}[H] - \centering - \graphicspath{{../_tmp/src/introduction/}} - \includegraphics[width=0.90\textwidth]{testbed-3n-dnv} - \label{fig:testbed-3n-dnv} - \end{figure} - -.. only:: html - - .. figure:: testbed-3n-dnv.svg - :alt: testbed-3n-dnv - :align: center - -SUT1 and SUT2 NICs: - -#. NIC-1: x553 2p10GE fiber Intel. -#. NIC-2: x553 2p10GE copper Intel. - -TG NICs: - -#. NIC-1: x710-DA4 4p10GE Intel. +.. _physical_testbeds_3n_tsh: 3-Node ARM TaiShan (3n-tsh) --------------------------- @@ -435,6 +319,8 @@ TG NICs: #. NIC-2: xxv710-DA2 2p25GE Intel. #. NIC-3: xl710-QDA2 2p40GE Intel. +.. _physical_testbeds_2n_tx2: + 2-Node ARM ThunderX2 (2n-tx2) ----------------------------- @@ -469,3 +355,39 @@ SUT NICs: TG NICs: #. NIC-1: xl710-QDA2 2p40GE Intel. + +.. _physical_testbeds_3n_snr: + +3-Node Atom Snowridge (3n-snr) +------------------------------ + +One 3n-snr testbed is built with: i) one SuperMicro SYS-740GP-TNRT +server acting as TG and equipped with two Intel Xeon Icelake Platinum +8358 processors (48 MB Cache, 2.60 GHz, 32 cores), and ii) SUT equipped with +one Intel Atom P5362 processor (27 MB Cache, 2.20 GHz, 24 cores). 3n-snr +physical topology is shown below. + +.. only:: latex + + .. raw:: latex + + \begin{figure}[H] + \centering + \graphicspath{{../_tmp/src/introduction/}} + \includegraphics[width=0.90\textwidth]{testbed-3n-snr} + \label{fig:testbed-3n-snr} + \end{figure} + +.. only:: html + + .. figure:: testbed-3n-snr.svg + :alt: testbed-3n-snr + :align: center + +SUT1 and SUT2 NICs: + +#. NIC-1: e822cq-DA4 4p25GE fiber Intel. + +TG NICs: + +#. NIC-1: e810xxv-DA4 4p25GE Intel.