X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Ftest_environment_intro.rst;h=7c4d5dfc9f1ee6d74d0092351c8154b83b260aa1;hb=12c3608c3464add7664e3b8f41b07b9b8fd03f1c;hp=0d35acee7241cddaaeb416a6d5afce014b6b08d1;hpb=25a8fe0aa594ca010b7f1aad449a2af2b6625bd7;p=csit.git

diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
index 0d35acee72..7c4d5dfc9f 100644
--- a/docs/report/introduction/test_environment_intro.rst
+++ b/docs/report/introduction/test_environment_intro.rst
@@ -28,30 +28,3 @@ physical testbeds are maintained in FD.io CSIT repository:
 `FD.io CSIT testbeds - Xeon Cascade Lake`_,
 `FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and
 `FD.io CSIT Testbeds - Xeon Haswell`_.
-
-Pre-Test Server Calibration
----------------------------
-
-Number of SUT server sub-system runtime parameters have been identified
-as impacting data plane performance tests. Calibrating those parameters
-is part of FD.io CSIT pre-test activities, and includes measuring and
-reporting following:
-
-#. System level core jitter – measure duration of core interrupts by
-   Linux in clock cycles and how often interrupts happen. Using
-   `CPU core jitter tool <https://git.fd.io/pma_tools/tree/jitter>`_.
-
-#. Memory bandwidth – measure bandwidth with `Intel MLC tool
-   <https://software.intel.com/en-us/articles/intelr-memory-latency-checker>`_.
-
-#. Memory latency – measure memory latency with Intel MLC tool.
-
-#. Cache latency at all levels (L1, L2, and Last Level Cache) – measure
-   cache latency with Intel MLC tool.
-
-Measured values of listed parameters are especially important for
-repeatable zero packet loss throughput measurements across multiple
-system instances. Generally they come useful as a background data for
-comparing data plane performance results across disparate servers.
-
-Following sections include measured calibration data for testbeds.