X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fhdrh_packet_latency_graphs%2Fip6.rst;h=76bc6ffda68006cef3ad68f148c289c52ee0dd47;hb=8da14b3b1d12f48a405ad23cf8ef49a3f6d26b1e;hp=3719bebfe7e415be79de6caf7912faff7633b5a5;hpb=174ad309b359e9b323b97cae0a6877dce33deb5f;p=csit.git diff --git a/docs/report/vpp_performance_tests/hdrh_packet_latency_graphs/ip6.rst b/docs/report/vpp_performance_tests/hdrh_packet_latency_graphs/ip6.rst index 3719bebfe7..76bc6ffda6 100644 --- a/docs/report/vpp_performance_tests/hdrh_packet_latency_graphs/ip6.rst +++ b/docs/report/vpp_performance_tests/hdrh_packet_latency_graphs/ip6.rst @@ -13,7 +13,7 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: @@ -21,5 +21,8 @@ CSIT source code for the test cases used for plots can be found in ip6-2n-skx-x710 ip6-3n-skx-xxv710 ip6-3n-skx-x710 + ip6-2n-clx-xxv710 + ip6-2n-clx-x710 + ip6-2n-clx-cx556a ip6-3n-hsw-xl710 ip6-3n-tsh-x520