X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;h=3aae134c624348487e4262db479a0be3679f17da;hb=124101d22151239b0411a73ae4d2bf8d70970937;hp=a430d5525d1040aacc3c6939de49a2efe845a9e6;hpb=4fbf1ec2d535d322725d395c369b6c9f7222c8dd;p=csit.git
diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
index a430d5525d..3aae134c62 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst
@@ -1,88 +1,52 @@
-L2 Ethernet Switching
-=====================
-
-This section includes summary graphs of VPP Phy-to-Phy packet latency
-with L2 Ethernet switching measured at 50% of discovered NDR throughput
-rate. Latency is reported for VPP running in multiple configurations of
-VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
-physical CPU core(s) placement.
-
-VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph below.
-
-.. raw:: html
-
.. raw:: latex
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-1t1c-l2-sel1-ndrdisc-lat50}
- \label{fig:64B-1t1c-l2-sel1-ndrdisc-lat50}
- \end{figure}
-
-*Figure 1a. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet
-Switching (base).*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
+ \clearpage
.. raw:: html
-
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-1t1c-l2-sel2-ndrdisc-lat50}
- \label{fig:64B-1t1c-l2-sel2-ndrdisc-lat50.html}
- \end{figure}
-
-*Figure 1b. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet
-Switching (feature).*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
-
-VPP packet latency in 2t2c setup (2thread, 2core) is presented in the graph below.
+
-.. raw:: html
-
-
-
-.. raw:: latex
-
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-2t2c-l2-sel1-ndrdisc-lat50}
- \label{fig:64B-2t2c-l2-sel1-ndrdisc-lat50}
- \end{figure}
-
-*Figure 2a. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet
-Switching (base).*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
-
-.. raw:: html
-
-
+L2 Ethernet Switching
+=====================
-.. raw:: latex
+This section includes summary graphs of VPP Phy-to-Phy packet latency
+with L2 Ethernet switching measured at 100% of discovered NDR throughput
+rate. Latency is reported for VPP running in multiple configurations of
+VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
+physical CPU core(s) placement.
- \begin{figure}[H]
- \centering
- \graphicspath{{../_build/_static/vpp/}}
- \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-2t2c-l2-sel2-ndrdisc-lat50}
- \label{fig:64B-2t2c-l2-sel2-ndrdisc-lat50}
- \end{figure}
+CSIT source code for the test cases used for plots can be found in
+`CSIT git repository `_.
-*Figure 2b. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet
-Switching (feature).*
+.. toctree::
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository `_.
+ l2-3n-hsw-x520
+ l2-3n-hsw-x710
+ l2-3n-hsw-xl710
+ l2-3n-skx-x710
+ l2-3n-skx-xxv710
+ l2-2n-skx-x710
+ l2-2n-skx-xxv710