X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fl2.rst;h=66b1fa44e2588d47ef4cd9486deb407d30d11d48;hb=9d324eab35857dac39015da42ce4e7cd3554ffaf;hp=c46fd03a380c3481002523969c01cbe1ff2df9f6;hpb=be82f49dda573dfc7010a56d6f76f8e161beac16;p=csit.git diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst index c46fd03a38..66b1fa44e2 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/l2.rst @@ -1,37 +1,54 @@ -L2 Ethernet Switching -===================== - -This section includes summary graphs of VPP Phy-to-Phy packet latency -with L2 Ethernet switching measured at 50% of discovered NDR throughput -rate. Latency is reported for VPP running in multiple configurations of -VPP worker thread(s), a.k.a. VPP data plane thread(s), and their -physical CPU core(s) placement. - -VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph below. - -.. raw:: html - -*Figure 1. VPP 1thread 1core - packet latency for Phy-to-Phy L2 Ethernet Switching.* +.. raw:: latex -CSIT source code for the test cases used for above plots can be found in CSIT -git repository: + \clearpage -.. program-output:: cd ../../ && set -x && cd tests/vpp/perf/l2 && grep -E "64B-1t1c-(eth|dot1q|dot1ad)-(l2xcbase|l2bdbasemaclrn)-(iacl50-state(ful|less)-flows10k.*|oacl50-state(ful|less)-flows10k.*|eth.*)*ndrdisc" * - :shell: +.. raw:: html -VPP packet latency in 2t2c setup (2thread, 2core) is presented in the graph below. + -.. raw:: html +L2 Ethernet Switching +===================== - +This section includes summary graphs of VPP Phy-to-Phy packet latency +with L2 Ethernet switching measured at 100% of discovered NDR throughput +rate. Latency is reported for VPP running in multiple configurations of +VPP worker thread(s), a.k.a. VPP data plane thread(s), and their +physical CPU core(s) placement. -*Figure 2. VPP 2threads 2cores - packet latency for Phy-to-Phy L2 Ethernet Switching.* +CSIT source code for the test cases used for plots can be found in +`CSIT git repository `_. -CSIT source code for the test cases used for above plots can be found in CSIT -git repository: +.. toctree:: -.. program-output:: cd ../../ && set -x && cd tests/vpp/perf/l2 && grep -E "64B-1t1c-(eth|dot1q|dot1ad)-(l2xcbase|l2bdbasemaclrn)-(iacl50-state(ful|less)-flows10k.*|oacl50-state(ful|less)-flows10k.*|eth.*)*ndrdisc" * - :shell: + l2-3n-skx-x710 +.. + l2-3n-hsw-x520 + l2-3n-hsw-x710 + l2-3n-hsw-xl710 + l2-3n-skx-xxv710 + l2-2n-skx-x710 + l2-2n-skx-xxv710