X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fpacket_latency_graphs%2Fvts.rst;h=8a4c27e2d102ca5680e6081dc5abc9fff19f59a9;hb=ac2c84d9561e2344057dc5d4173b0c7718015c4b;hp=65a4dcf8b3196c95ce44618339450dbac393e424;hpb=dfff0ee80f3912a6db3f4356254f4cb3e3a9450d;p=csit.git diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst index 65a4dcf8b3..8a4c27e2d1 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst @@ -3,8 +3,8 @@ \clearpage -VTS -=== +Virtual Topology System +======================= This section includes summary graphs of VPP Phy-to-VM(s)-to-Phy packet latency with with VM virtio and VPP vhost-user virtual interfaces @@ -14,8 +14,10 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: - vts-3n-hsw-x520 + vts-3n-skx-xxv710 + vts-3n-hsw-xl710 + vts-3n-tsh-x520