X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fip4_tunnels.rst;h=3870b02fe3ac547604b32ac101941c6531e29241;hb=1c32c469514179f2a77ad2049c5e6ebf1c30bea8;hp=d37a44f450ff00108149c631e2a55226a020d718;hpb=80e558550b0f076857618c4451987fb60ced19b9;p=csit.git diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst index d37a44f450..3870b02fe3 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst @@ -15,10 +15,13 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: + ip4_tunnels-2n-skx-xxv710 + ip4_tunnels-2n-clx-xxv710 + ip4_tunnels-2n-zn2-xxv710 ip4_tunnels-3n-skx-xxv710 ip4_tunnels-3n-hsw-xl710 ip4_tunnels-3n-tsh-x520