X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fip4_tunnels.rst;h=38a59371e465a044d6e92eba0c0dc840fe78d2c7;hb=974876b90a5a438d8c7f476c63e82547e59adbdc;hp=503e3019bf69e96b0be20f66ac0480b611c52f26;hpb=dfff0ee80f3912a6db3f4356254f4cb3e3a9450d;p=csit.git diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst index 503e3019bf..38a59371e4 100644 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst +++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst @@ -15,10 +15,13 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. +`CSIT git repository `_. .. toctree:: - ip4_tunnels-3n-hsw-x520 - ip4_tunnels-3n-hsw-x710 - ip4_tunnels-3n-skx-x710 + ip4_tunnels-3n-hsw-xl710 + ip4_tunnels-3n-tsh-x520 + ip4_tunnels-3n-dnv-x553 + +.. + ip4_tunnels-3n-skx-xxv710