X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fipsec.rst;h=8f1102fafffa0f99cc593fc9986472077df88dee;hb=HEAD;hp=d612a8acce249a8227170834e6d71551dc06adbd;hpb=53310a9c512daecbe20a45eb48f5167ea5a6a8b2;p=csit.git diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst deleted file mode 100644 index d612a8acce..0000000000 --- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst +++ /dev/null @@ -1,24 +0,0 @@ - -.. raw:: latex - - \clearpage - -IPSec IPv4 Routing -================== - -Following sections include Throughput Speedup Analysis for VPP multi- -core multi-thread configurations with no Hyper-Threading, specifically -for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput -results are used as a reference for reported speedup ratio. -VPP IPSec encryption is accelerated using DPDK cryptodev -library driving Intel Quick Assist (QAT) crypto PCIe hardware cards. -Performance is reported for VPP running in multiple configurations of -VPP worker thread(s), a.k.a. VPP data plane thread(s), and their -physical CPU core(s) placement. - -CSIT source code for the test cases used for plots can be found in -`CSIT git repository `_. - -.. toctree:: - - ipsec-3n-hsw-xl710