X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=docs%2Freport%2Fvpp_performance_tests%2Fthroughput_speedup_multi_core%2Fl2.rst;h=327fd6850ed19a03f2068af29177aa0e04d52e33;hb=9d324eab35857dac39015da42ce4e7cd3554ffaf;hp=5db8eba3074605dc710f6909318c1721fa949cc3;hpb=4fbf1ec2d535d322725d395c369b6c9f7222c8dd;p=csit.git

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
index 5db8eba307..327fd6850e 100644
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/l2.rst
@@ -1,3 +1,8 @@
+
+.. raw:: latex
+
+    \clearpage
+
 L2 Ethernet Switching
 =====================
 
@@ -9,81 +14,18 @@ used for the graphs comes from Phy-to-Phy 64B performance tests with VPP
 L2 Ethernet switching, including NDR throughput (zero packet loss) and
 PDR throughput (<0.5% packet loss).
 
-NDR Throughput
---------------
-
-VPP NDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 and 40ge2p1xl710 network interface cards.
-
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
-
-.. raw:: html
-
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/10ge2p1x520-64B-l2-tsa-ndrdisc.html"></iframe>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-l2-tsa-ndrdisc}
-            \label{fig:10ge2p1x520-64B-l2-tsa-ndrdisc}
-    \end{figure}
-
-*Figure 1. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1804>`_.
-
-NIC 40ge2p1xl710
-~~~~~~~~~~~~~~~~
-
-.. raw:: html
-
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/40ge2p1xl710-64B-l2-tsa-ndrdisc.html"></iframe>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{40ge2p1xl710-64B-l2-tsa-ndrdisc}
-            \label{fig:40ge2p1xl710-64B-l2-tsa-ndrdisc}
-    \end{figure}
-
-*Figure 2. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-NDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
 CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1804>`_.
-
-PDR Throughput
---------------
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1901>`_.
 
-VPP PDR 64B packet throughput speedup ratio is presented in the graphs
-below for 10ge2p1x520 and 40ge2p1xl710 network interface cards. PDR
-measured for 0.5% packet loss ratio.
+.. toctree::
 
-NIC 10ge2p1x520
-~~~~~~~~~~~~~~~
+    l2-3n-skx-x710
 
-.. raw:: html
-
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/10ge2p1x520-64B-l2-tsa-pdrdisc.html"></iframe>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{10ge2p1x520-64B-l2-tsa-pdrdisc}
-            \label{fig:10ge2p1x520-64B-l2-tsa-pdrdisc}
-    \end{figure}
-
-*Figure 3. Throughput Speedup Analysis - Multi-Core Speedup Ratio - Normalized
-PDR Throughput for Phy-to-Phy L2 Ethernet Switching.*
-
-CSIT source code for the test cases used for above plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/l2?h=rls1804>`_.
+..
+    l2-3n-hsw-x520
+    l2-3n-hsw-x710
+    l2-3n-hsw-xl710
+    l2-3n-skx-xxv710
+    l2-2n-skx-x710
+    l2-2n-skx-xxv710
+    l2-2n-dnv-x553