X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=drivers%2Fnet%2Fsfc%2Fbase%2Fef10_impl.h;h=e79f4d539d74af286cae117320aa75a8d5c7f3aa;hb=ca33590b6af032bff57d9cc70455660466a654b2;hp=8c3dffee390c1e4bc2ac616f877bea3c685083c6;hpb=7595afa4d30097c1177b69257118d8ad89a539be;p=deb_dpdk.git diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h index 8c3dffee..e79f4d53 100644 --- a/drivers/net/sfc/base/ef10_impl.h +++ b/drivers/net/sfc/base/ef10_impl.h @@ -1,31 +1,7 @@ -/* - * Copyright (c) 2015-2016 Solarflare Communications Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: +/* SPDX-License-Identifier: BSD-3-Clause * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * The views and conclusions contained in the software and documentation are - * those of the authors and should not be interpreted as representing official - * policies, either expressed or implied, of the FreeBSD Project. + * Copyright (c) 2015-2018 Solarflare Communications Inc. + * All rights reserved. */ #ifndef _SYS_EF10_IMPL_H @@ -50,8 +26,9 @@ extern "C" { */ #define EF10_NVRAM_CHUNK 0x80 -/* Alignment requirement for value written to RX WPTR: - * the WPTR must be aligned to an 8 descriptor boundary +/* + * Alignment requirement for value written to RX WPTR: the WPTR must be aligned + * to an 8 descriptor boundary. */ #define EF10_RX_WPTR_ALIGN 8 @@ -80,7 +57,7 @@ ef10_ev_qcreate( __in efx_nic_t *enp, __in unsigned int index, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, __in uint32_t us, __in uint32_t flags, @@ -117,7 +94,7 @@ ef10_ev_rxlabel_init( __in efx_evq_t *eep, __in efx_rxq_t *erp, __in unsigned int label, - __in boolean_t packed_stream); + __in efx_rxq_type_t type); void ef10_ev_rxlabel_fini( @@ -442,6 +419,14 @@ ef10_nvram_partn_read( __out_bcount(size) caddr_t data, __in size_t size); +extern __checkReturn efx_rc_t +ef10_nvram_partn_read_backup( + __in efx_nic_t *enp, + __in uint32_t partn, + __in unsigned int offset, + __out_bcount(size) caddr_t data, + __in size_t size); + extern __checkReturn efx_rc_t ef10_nvram_partn_erase( __in efx_nic_t *enp, @@ -460,7 +445,8 @@ ef10_nvram_partn_write( extern __checkReturn efx_rc_t ef10_nvram_partn_rw_finish( __in efx_nic_t *enp, - __in uint32_t partn); + __in uint32_t partn, + __out_opt uint32_t *verify_resultp); extern __checkReturn efx_rc_t ef10_nvram_partn_get_version( @@ -496,8 +482,7 @@ ef10_nvram_buffer_find_item_start( __in_bcount(buffer_size) caddr_t bufferp, __in size_t buffer_size, - __out uint32_t *startp - ); + __out uint32_t *startp); extern __checkReturn efx_rc_t ef10_nvram_buffer_find_end( @@ -505,8 +490,7 @@ ef10_nvram_buffer_find_end( caddr_t bufferp, __in size_t buffer_size, __in uint32_t offset, - __out uint32_t *endp - ); + __out uint32_t *endp); extern __checkReturn __success(return != B_FALSE) boolean_t ef10_nvram_buffer_find_item( @@ -515,8 +499,7 @@ ef10_nvram_buffer_find_item( __in size_t buffer_size, __in uint32_t offset, __out uint32_t *startp, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn efx_rc_t ef10_nvram_buffer_get_item( @@ -528,8 +511,7 @@ ef10_nvram_buffer_get_item( __out_bcount_part(item_max_size, *lengthp) caddr_t itemp, __in size_t item_max_size, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn efx_rc_t ef10_nvram_buffer_insert_item( @@ -539,8 +521,7 @@ ef10_nvram_buffer_insert_item( __in uint32_t offset, __in_bcount(length) caddr_t keyp, __in uint32_t length, - __out uint32_t *lengthp - ); + __out uint32_t *lengthp); extern __checkReturn efx_rc_t ef10_nvram_buffer_delete_item( @@ -549,15 +530,13 @@ ef10_nvram_buffer_delete_item( __in size_t buffer_size, __in uint32_t offset, __in uint32_t length, - __in uint32_t end - ); + __in uint32_t end); extern __checkReturn efx_rc_t ef10_nvram_buffer_finish( __in_bcount(buffer_size) caddr_t bufferp, - __in size_t buffer_size - ); + __in size_t buffer_size); #endif /* EFSYS_OPT_NVRAM */ @@ -659,7 +638,7 @@ ef10_tx_qcreate( __in unsigned int index, __in unsigned int label, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, __in uint16_t flags, __in efx_evq_t *eep, @@ -670,13 +649,13 @@ extern void ef10_tx_qdestroy( __in efx_txq_t *etp); -extern __checkReturn efx_rc_t +extern __checkReturn efx_rc_t ef10_tx_qpost( - __in efx_txq_t *etp, - __in_ecount(n) efx_buffer_t *eb, - __in unsigned int n, - __in unsigned int completed, - __inout unsigned int *addedp); + __in efx_txq_t *etp, + __in_ecount(ndescs) efx_buffer_t *ebp, + __in unsigned int ndescs, + __in unsigned int completed, + __inout unsigned int *addedp); extern void ef10_tx_qpush( @@ -686,8 +665,8 @@ ef10_tx_qpush( #if EFSYS_OPT_RX_PACKED_STREAM extern void -ef10_rx_qps_update_credits( - __in efx_rxq_t *erp); +ef10_rx_qpush_ps_credits( + __in efx_rxq_t *erp); extern __checkReturn uint8_t * ef10_rx_qps_packet_info( @@ -786,7 +765,7 @@ ef10_tx_qstats_update( typedef uint32_t efx_piobuf_handle_t; -#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1) +#define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t)-1) extern __checkReturn efx_rc_t ef10_nic_pio_alloc( @@ -897,9 +876,22 @@ ef10_rx_scatter_enable( #if EFSYS_OPT_RX_SCALE +extern __checkReturn efx_rc_t +ef10_rx_scale_context_alloc( + __in efx_nic_t *enp, + __in efx_rx_scale_context_type_t type, + __in uint32_t num_queues, + __out uint32_t *rss_contextp); + +extern __checkReturn efx_rc_t +ef10_rx_scale_context_free( + __in efx_nic_t *enp, + __in uint32_t rss_context); + extern __checkReturn efx_rc_t ef10_rx_scale_mode_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in efx_rx_hash_alg_t alg, __in efx_rx_hash_type_t type, __in boolean_t insert); @@ -907,12 +899,14 @@ ef10_rx_scale_mode_set( extern __checkReturn efx_rc_t ef10_rx_scale_key_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in_ecount(n) uint8_t *key, __in size_t n); extern __checkReturn efx_rc_t ef10_rx_scale_tbl_set( __in efx_nic_t *enp, + __in uint32_t rss_context, __in_ecount(n) unsigned int *table, __in size_t n); @@ -930,14 +924,14 @@ ef10_rx_prefix_pktlen( __in uint8_t *buffer, __out uint16_t *lengthp); -extern void +extern void ef10_rx_qpost( - __in efx_rxq_t *erp, - __in_ecount(n) efsys_dma_addr_t *addrp, - __in size_t size, - __in unsigned int n, - __in unsigned int completed, - __in unsigned int added); + __in efx_rxq_t *erp, + __in_ecount(ndescs) efsys_dma_addr_t *addrp, + __in size_t size, + __in unsigned int ndescs, + __in unsigned int completed, + __in unsigned int added); extern void ef10_rx_qpush( @@ -959,9 +953,11 @@ ef10_rx_qcreate( __in unsigned int index, __in unsigned int label, __in efx_rxq_type_t type, + __in uint32_t type_data, __in efsys_mem_t *esmp, - __in size_t n, + __in size_t ndescs, __in uint32_t id, + __in unsigned int flags, __in efx_evq_t *eep, __in efx_rxq_t *erp); @@ -1005,6 +1001,13 @@ typedef struct ef10_filter_entry_s { /* Allow for the broadcast address to be added to the multicast list */ #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1) +/* + * For encapsulated packets, there is one filter each for each combination of + * IPv4 or IPv6 outer frame, VXLAN, GENEVE or NVGRE packet type, and unicast or + * multicast inner frames. + */ +#define EFX_EF10_FILTER_ENCAP_FILTERS_MAX 12 + typedef struct ef10_filter_table_s { ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS]; efx_rxq_t *eft_default_rxq; @@ -1016,6 +1019,9 @@ typedef struct ef10_filter_table_s { EFX_EF10_FILTER_MULTICAST_FILTERS_MAX]; uint32_t eft_mulcst_filter_count; boolean_t eft_using_all_mulcst; + uint32_t eft_encap_filter_indexes[ + EFX_EF10_FILTER_ENCAP_FILTERS_MAX]; + uint32_t eft_encap_filter_count; } ef10_filter_table_t; __checkReturn efx_rc_t @@ -1167,9 +1173,9 @@ ef10_external_port_mapping( /* Minimum space for packet in packed stream mode */ #define EFX_RX_PACKED_STREAM_MIN_PACKET_SPACE \ P2ROUNDUP(EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE + \ - EFX_MAC_PDU_MIN + \ - EFX_RX_PACKED_STREAM_ALIGNMENT, \ - EFX_RX_PACKED_STREAM_ALIGNMENT) + EFX_MAC_PDU_MIN + \ + EFX_RX_PACKED_STREAM_ALIGNMENT, \ + EFX_RX_PACKED_STREAM_ALIGNMENT) /* Maximum number of credits */ #define EFX_RX_PACKED_STREAM_MAX_CREDITS 127