X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=examples%2Fdpdk_qat%2Fconfig_files%2Fstargo%2Fdh89xxcc_qa_dev0.conf;fp=examples%2Fdpdk_qat%2Fconfig_files%2Fstargo%2Fdh89xxcc_qa_dev0.conf;h=c3a85dea2d42798f9807a8933735d820c21d39ba;hb=97f17497d162afdb82c8704bf097f0fee3724b2e;hp=0000000000000000000000000000000000000000;hpb=e04be89c2409570e0055b2cda60bd11395bb93b0;p=deb_dpdk.git diff --git a/examples/dpdk_qat/config_files/stargo/dh89xxcc_qa_dev0.conf b/examples/dpdk_qat/config_files/stargo/dh89xxcc_qa_dev0.conf new file mode 100644 index 00000000..c3a85dea --- /dev/null +++ b/examples/dpdk_qat/config_files/stargo/dh89xxcc_qa_dev0.conf @@ -0,0 +1,235 @@ +######################################################################### +# +# @par +# BSD LICENSE +# +# Copyright(c) 2010-2014 Intel Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Intel Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# ######################################################################### +# ######################################################## +# +# This file is the configuration for a single dh89xxcc_qa +# device. +# +# Each device has up to two accelerators. +# - The client may load balance between these +# accelerators. +# Each accelerator has 8 independent ring banks. +# - The interrupt for each can be directed to a +# specific core. +# Each ring bank as 16 rings (hardware assisted queues). +# +######################################################### +# General Section +############################################## + +[GENERAL] +ServicesEnabled = cy0;cy1 + +# Use version 2 of the config file +ConfigVersion = 2 +# Look Aside Cryptographic Configuration +cyHmacAuthMode = 1 + +# Look Aside Compression Configuration +dcTotalSRAMAvailable = 0 + +# Firmware Location Configuration +Firmware_MofPath = mof_firmware.bin +Firmware_MmpPath = mmp_firmware.bin + +#Default values for number of concurrent requests*/ +CyNumConcurrentSymRequests = 512 +CyNumConcurrentAsymRequests = 64 +DcNumConcurrentRequests = 512 + +#Statistics, valid values: 1,0 +statsGeneral = 1 +statsDc = 1 +statsDh = 1 +statsDrbg = 1 +statsDsa = 1 +statsEcc = 1 +statsKeyGen = 1 +statsLn = 1 +statsPrime = 1 +statsRsa = 1 +statsSym = 1 + +# Enables or disables Single Root Complex IO Virtualization. +# If this is enabled (1) then SRIOV and VT-d need to be enabled in +# BIOS and there can be no Cy or Dc instances created in PF (Dom0). +# If this i disabled (0) then SRIOV and VT-d need to be disabled +# in BIOS and Cy and/or Dc instances can be used in PF (Dom0) +SRIOV_Enabled = 0 + +#Debug feature, if set to 1 it enables additional entries in /proc filesystem +ProcDebug = 1 + +####################################################### +# +# Logical Instances Section +# A logical instance allows each address domain +# (kernel space and individual user space processes) +# to configure rings (i.e. hardware assisted queues) +# to be used by that address domain and to define the +# behavior of that ring. +# +# The address domains are in the following format +# - For kernel address domains +# [KERNEL] +# - For user process address domains +# [xxxxx] +# Where xxxxx may be any ascii value which uniquely identifies +# the user mode process. +# To allow the driver correctly configure the +# logical instances associated with this user process, +# the process must call the icp_sal_userStartMultiProcess(...) +# passing the xxxxx string during process initialisation. +# When the user space process is finished it must call +# icp_sal_userStop(...) to free resources. +# NumProcesses will indicate the maximum number of processes +# that can call icp_sal_userStartMultiProcess on this instance. +# Warning: the resources are preallocated: if NumProcesses +# is too high, the driver will fail to load +# +# Items configurable by a logical instance are: +# - Name of the logical instance +# - The accelerator associated with this logical +# instance +# - The core the instance is affinitized to (optional) +# +# Note: Logical instances may not share the same ring, but +# may share a ring bank. +# +# The format of the logical instances are: +# - For crypto: +# CyName = "xxxx" +# CyAcceleratorNumber = 0-3 +# CyCoreAffinity = 0-7 +# +# - For Data Compression +# DcName = "xxxx" +# DcAcceleratorNumber = 0-1 +# DcCoreAffinity = 0-7 +# +# Where: +# - n is the number of this logical instance starting at 0. +# - xxxx may be any ascii value which identifies the logical instance. +# +# Note: for user space processes, a list of values can be specified for +# the accelerator number and the core affinity: for example +# Cy0AcceleratorNumber = 0,2 +# Cy0CoreAffinity = 0,2,4 +# These comma-separated lists will allow the multiple processes to use +# different accelerators and cores, and will wrap around the numbers +# in the list. In the above example, process 0 will use accelerator 0, +# and process 1 will use accelerator 2 +# +######################################################## + +############################################## +# Kernel Instances Section +############################################## +[KERNEL] +NumberCyInstances = 0 +NumberDcInstances = 0 + +############################################## +# User Process Instance Section +############################################## +[SSL] +NumberCyInstances = 8 +NumberDcInstances = 0 +NumProcesses = 1 +LimitDevAccess = 0 + +# Crypto - User instance #0 +Cy0Name = "SSL0" +Cy0IsPolled = 1 +Cy0AcceleratorNumber = 0 +# List of core affinities +Cy0CoreAffinity = 0 + +# Crypto - User instance #1 +Cy1Name = "SSL1" +Cy1IsPolled = 1 +Cy1AcceleratorNumber = 1 +# List of core affinities +Cy1CoreAffinity = 1 + +# Crypto - User instance #2 +Cy2Name = "SSL2" +Cy2IsPolled = 1 +Cy2AcceleratorNumber = 2 +# List of core affinities +Cy2CoreAffinity = 2 + +# Crypto - User instance #3 +Cy3Name = "SSL3" +Cy3IsPolled = 1 +Cy3AcceleratorNumber = 3 +# List of core affinities +Cy3CoreAffinity = 3 + +# Crypto - User instance #4 +Cy4Name = "SSL4" +Cy4IsPolled = 1 +Cy4AcceleratorNumber = 0 +# List of core affinities +Cy4CoreAffinity = 4 + +# Crypto - User instance #5 +Cy5Name = "SSL5" +Cy5IsPolled = 1 +Cy5AcceleratorNumber = 1 +# List of core affinities +Cy5CoreAffinity = 5 + +# Crypto - User instance #6 +Cy6Name = "SSL6" +Cy6IsPolled = 1 +Cy6AcceleratorNumber = 2 +# List of core affinities +Cy6CoreAffinity = 6 + +# Crypto - User instance #7 +Cy7Name = "SSL7" +Cy7IsPolled = 1 +Cy7AcceleratorNumber = 3 +# List of core affinities +Cy7CoreAffinity = 7 + +############################################## +# Wireless Process Instance Section +############################################## +[WIRELESS] +NumberCyInstances = 0 +NumberDcInstances = 0 +NumProcesses = 0