X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=src%2Fplugins%2Favf%2Favf.h;h=6c09084eb8c8a0c292a0a6e0782ea9f375bff47d;hb=ffe9a5489;hp=c8074ebf6c7232dd880da720c3cddb8d1d26d3ff;hpb=6c9b9644450b5ee5672b1e0f66257b0e09fb0734;p=vpp.git diff --git a/src/plugins/avf/avf.h b/src/plugins/avf/avf.h index c8074ebf6c7..6c09084eb8c 100644 --- a/src/plugins/avf/avf.h +++ b/src/plugins/avf/avf.h @@ -20,16 +20,97 @@ #include -#include +#include +#include +#include -#define foreach_avf_device_flags \ - _(0, INITIALIZED, "initialized") \ - _(1, ERROR, "error") \ - _(2, ADMIN_UP, "admin-up") \ - _(3, IOVA, "iova") \ - _(4, LINK_UP, "link-up") \ - _(5, SHARED_TXQ_LOCK, "shared-txq-lock") \ - _(6, ELOG, "elog") +#include +#include + +#include + +#include +#include + +#define AVF_QUEUE_SZ_MAX 4096 +#define AVF_QUEUE_SZ_MIN 64 + +#define AVF_AQ_ENQ_SUSPEND_TIME 50e-6 +#define AVF_AQ_ENQ_MAX_WAIT_TIME 250e-3 + +#define AVF_RESET_SUSPEND_TIME 20e-3 +#define AVF_RESET_MAX_WAIT_TIME 1 + +#define AVF_SEND_TO_PF_SUSPEND_TIME 10e-3 +#define AVF_SEND_TO_PF_MAX_WAIT_TIME 1 + +#define AVF_RXD_STATUS(x) (1ULL << x) +#define AVF_RXD_STATUS_DD AVF_RXD_STATUS(0) +#define AVF_RXD_STATUS_EOP AVF_RXD_STATUS(1) +#define AVF_RXD_ERROR_SHIFT 19 +#define AVF_RXD_PTYPE_SHIFT 30 +#define AVF_RXD_LEN_SHIFT 38 +#define AVF_RX_MAX_DESC_IN_CHAIN 5 + +#define AVF_RXD_ERROR_IPE (1ULL << (AVF_RXD_ERROR_SHIFT + 3)) +#define AVF_RXD_ERROR_L4E (1ULL << (AVF_RXD_ERROR_SHIFT + 4)) + +#define AVF_TXD_CMD(x) (1 << (x + 4)) +#define AVF_TXD_CMD_EXT(x, val) ((u64)val << (x + 4)) +#define AVF_TXD_CMD_EOP AVF_TXD_CMD(0) +#define AVF_TXD_CMD_RS AVF_TXD_CMD(1) +#define AVF_TXD_CMD_RSV AVF_TXD_CMD(2) + +#define AVF_TXD_CMD_IIPT_NONE AVF_TXD_CMD_EXT(5, 0) +#define AVF_TXD_CMD_IIPT_IPV6 AVF_TXD_CMD_EXT(5, 1) +#define AVF_TXD_CMD_IIPT_IPV4_NO_CSUM AVF_TXD_CMD_EXT(5, 2) +#define AVF_TXD_CMD_IIPT_IPV4 AVF_TXD_CMD_EXT(5, 3) + +#define AVF_TXD_CMD_L4T_UNKNOWN AVF_TXD_CMD_EXT(8, 0) +#define AVF_TXD_CMD_L4T_TCP AVF_TXD_CMD_EXT(8, 1) +#define AVF_TXD_CMD_L4T_SCTP AVF_TXD_CMD_EXT(8, 2) +#define AVF_TXD_CMD_L4T_UDP AVF_TXD_CMD_EXT(8, 3) + +#define AVF_TXD_OFFSET(x,factor,val) (((u64)val/(u64)factor) << (16 + x)) +#define AVF_TXD_OFFSET_MACLEN(val) AVF_TXD_OFFSET( 0, 2, val) +#define AVF_TXD_OFFSET_IPLEN(val) AVF_TXD_OFFSET( 7, 4, val) +#define AVF_TXD_OFFSET_L4LEN(val) AVF_TXD_OFFSET(14, 4, val) + +#define AVF_TXD_DTYP_CTX 0x1ULL +#define AVF_TXD_CTX_CMD_TSO AVF_TXD_CMD(0) +#define AVF_TXD_CTX_SEG(val,x) (((u64)val) << (30 + x)) +#define AVF_TXD_CTX_SEG_TLEN(val) AVF_TXD_CTX_SEG(val,0) +#define AVF_TXD_CTX_SEG_MSS(val) AVF_TXD_CTX_SEG(val,20) + + +extern vlib_log_class_registration_t avf_log; + +#define avf_log_err(dev, f, ...) \ + vlib_log (VLIB_LOG_LEVEL_ERR, avf_log.class, "%U: " f, \ + format_vlib_pci_addr, &dev->pci_addr, \ + ## __VA_ARGS__) + +#define avf_log_warn(dev, f, ...) \ + vlib_log (VLIB_LOG_LEVEL_WARNING, avf_log.class, "%U: " f, \ + format_vlib_pci_addr, &dev->pci_addr, \ + ## __VA_ARGS__) + +#define avf_log_debug(dev, f, ...) \ + vlib_log (VLIB_LOG_LEVEL_DEBUG, avf_log.class, "%U: " f, \ + format_vlib_pci_addr, &dev->pci_addr, \ + ## __VA_ARGS__) + +#define foreach_avf_device_flags \ + _ (0, INITIALIZED, "initialized") \ + _ (1, ERROR, "error") \ + _ (2, ADMIN_UP, "admin-up") \ + _ (3, VA_DMA, "vaddr-dma") \ + _ (4, LINK_UP, "link-up") \ + _ (5, SHARED_TXQ_LOCK, "shared-txq-lock") \ + _ (6, ELOG, "elog") \ + _ (7, PROMISC, "promisc") \ + _ (8, RX_INT, "rx-interrupts") \ + _ (9, RX_FLOW_OFFLOAD, "rx-flow-offload") enum { @@ -38,19 +119,39 @@ enum #undef _ }; -typedef struct +typedef volatile struct { - u64 qword[4]; + union + { + struct + { + u64 mirr:13; + u64 rsv1:3; + u64 l2tag1:16; + u64 filter_status:32; + u64 status:19; + u64 error:8; + u64 rsv2:3; + u64 ptype:8; + u64 length:26; + }; + u64 qword[4]; +#ifdef CLIB_HAVE_VEC256 + u64x4 as_u64x4; +#endif + }; } avf_rx_desc_t; STATIC_ASSERT_SIZEOF (avf_rx_desc_t, 32); -typedef struct +typedef volatile struct { union { u64 qword[2]; +#ifdef CLIB_HAVE_VEC128 u64x2 as_u64x2; +#endif }; } avf_tx_desc_t; @@ -64,7 +165,10 @@ typedef struct u16 size; avf_rx_desc_t *descs; u32 *bufs; - u16 n_bufs; + u16 n_enqueued; + u8 int_mode; + u8 buffer_pool_index; + u32 queue_index; } avf_rxq_t; typedef struct @@ -73,12 +177,28 @@ typedef struct volatile u32 *qtx_tail; u16 next; u16 size; + u32 ctx_desc_placeholder_bi; clib_spinlock_t lock; avf_tx_desc_t *descs; u32 *bufs; - u16 n_bufs; + u16 n_enqueued; + u16 *rs_slots; } avf_txq_t; +typedef struct +{ + u32 flow_index; + u32 mark; + struct avf_fdir_conf *rcfg; +} avf_flow_entry_t; + +typedef struct +{ + u32 flow_id; + u16 next_index; + i16 buffer_advance; +} avf_flow_lookup_entry_t; + typedef struct { CLIB_CACHE_LINE_ALIGN_MARK (cacheline0); @@ -89,11 +209,15 @@ typedef struct u32 sw_if_index; u32 hw_if_index; vlib_pci_dev_handle_t pci_dev_handle; + u32 numa_node; void *bar0; + u8 *name; /* queues */ avf_rxq_t *rxqs; avf_txq_t *txqs; + u16 n_tx_queues; + u16 n_rx_queues; /* Admin queues */ avf_aq_desc_t *atq; @@ -111,67 +235,80 @@ typedef struct u8 hwaddr[6]; u16 num_queue_pairs; u16 max_vectors; + u16 n_rx_irqs; u16 max_mtu; u32 rss_key_size; u32 rss_lut_size; virtchnl_link_speed_t link_speed; + vlib_pci_addr_t pci_addr; + + /* flow */ + avf_flow_entry_t *flow_entries; /* pool */ + avf_flow_lookup_entry_t *flow_lookup_entries; /* pool */ /* stats */ virtchnl_eth_stats_t eth_stats; + virtchnl_eth_stats_t last_cleared_eth_stats; /* error */ clib_error_t *error; } avf_device_t; -typedef struct -{ - u32 status; - u16 length; - u8 ptype; - u8 error; -} avf_rx_vector_entry_t; - -STATIC_ASSERT_SIZEOF (avf_rx_vector_entry_t, 8); - #define AVF_RX_VECTOR_SZ VLIB_FRAME_SIZE -enum +typedef enum { AVF_PROCESS_EVENT_START = 1, - AVF_PROCESS_EVENT_STOP = 2, + AVF_PROCESS_EVENT_DELETE_IF = 2, AVF_PROCESS_EVENT_AQ_INT = 3, + AVF_PROCESS_EVENT_REQ = 4, } avf_process_event_t; +typedef enum +{ + AVF_PROCESS_REQ_ADD_DEL_ETH_ADDR = 1, + AVF_PROCESS_REQ_CONFIG_PROMISC_MDDE = 2, + AVF_PROCESS_REQ_PROGRAM_FLOW = 3, +} avf_process_req_type_t; + typedef struct { - CLIB_CACHE_LINE_ALIGN_MARK (cacheline0); - avf_rx_vector_entry_t rx_vector[AVF_RX_VECTOR_SZ]; - u32 *to_free; - vlib_buffer_t buffer_template; -} avf_per_thread_data_t; + avf_process_req_type_t type; + u32 dev_instance; + u32 calling_process_index; + u8 eth_addr[6]; + int is_add, is_enable; + + /* below parameters are used for 'program flow' event */ + u8 *rule; + u32 rule_len; + u8 *program_status; + u32 status_len; + + clib_error_t *error; +} avf_process_req_t; typedef struct { - u8 next_node; - i8 buffer_advance; - u32 flags; -} avf_ptype_t; + u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN - 1]; + u32 buffers[AVF_RX_MAX_DESC_IN_CHAIN - 1]; +} avf_rx_tail_t; -STATIC_ASSERT (VNET_DEVICE_INPUT_N_NEXT_NODES < 256, "too many next nodes"); +typedef struct +{ + CLIB_CACHE_LINE_ALIGN_MARK (cacheline0); + vlib_buffer_t *bufs[AVF_RX_VECTOR_SZ]; + u64 qw1s[AVF_RX_VECTOR_SZ]; + avf_rx_tail_t tails[AVF_RX_VECTOR_SZ]; + vlib_buffer_t buffer_template; +} avf_per_thread_data_t; typedef struct { u16 msg_id_base; - avf_device_t *devices; + avf_device_t **devices; avf_per_thread_data_t *per_thread_data; - vlib_physmem_region_index_t physmem_region; - int physmem_region_alloc; - - vlib_log_class_t log_class; - - /* 256 element array for ptype based lookup */ - avf_ptype_t *ptypes; } avf_main_t; extern avf_main_t avf_main; @@ -179,26 +316,38 @@ extern avf_main_t avf_main; typedef struct { vlib_pci_addr_t addr; + u8 *name; int enable_elog; + u16 rxq_num; u16 rxq_size; u16 txq_size; /* return */ int rv; + u32 sw_if_index; clib_error_t *error; } avf_create_if_args_t; void avf_create_if (vlib_main_t * vm, avf_create_if_args_t * args); -void avf_delete_if (vlib_main_t * vm, avf_device_t * ad); extern vlib_node_registration_t avf_input_node; +extern vlib_node_registration_t avf_process_node; extern vnet_device_class_t avf_device_class; -uword avf_interface_tx (vlib_main_t * vm, vlib_node_runtime_t * node, - vlib_frame_t * frame); + +clib_error_t *avf_program_flow (u32 dev_instance, int is_add, u8 *rule, + u32 rule_len, u8 *program_status, + u32 status_len); /* format.c */ format_function_t format_avf_device; format_function_t format_avf_device_name; format_function_t format_avf_input_trace; +vnet_flow_dev_ops_function_t avf_flow_ops_fn; + +static_always_inline avf_device_t * +avf_get_device (u32 dev_instance) +{ + return pool_elt_at_index (avf_main.devices, dev_instance)[0]; +} static inline u32 avf_get_u32 (void *start, int offset) @@ -259,13 +408,49 @@ avf_reg_flush (avf_device_t * ad) asm volatile ("":::"memory"); } +static inline void +avf_tail_write (volatile u32 *addr, u32 val) +{ +#ifdef __MOVDIRI__ + _mm_sfence (); + _directstoreu_u32 ((void *) addr, val); +#else + clib_atomic_store_rel_n (addr, val); +#endif +} + +static_always_inline int +avf_rxd_is_not_eop (avf_rx_desc_t * d) +{ + return (d->qword[1] & AVF_RXD_STATUS_EOP) == 0; +} + +static_always_inline int +avf_rxd_is_not_dd (avf_rx_desc_t * d) +{ + return (d->qword[1] & AVF_RXD_STATUS_DD) == 0; +} + typedef struct { - u32 next_index; + u16 qid; + u16 next_index; u32 hw_if_index; - avf_rx_vector_entry_t rxve; + u64 qw1s[AVF_RX_MAX_DESC_IN_CHAIN]; } avf_input_trace_t; +#define foreach_avf_tx_func_error \ + _(SEGMENT_SIZE_EXCEEDED, "segment size exceeded") \ + _(NO_FREE_SLOTS, "no free tx slots") + +typedef enum +{ +#define _(f,s) AVF_TX_ERROR_##f, + foreach_avf_tx_func_error +#undef _ + AVF_TX_N_ERROR, +} avf_tx_func_error_t; + #endif /* AVF_H */ /*