X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=src%2Fplugins%2Fixge%2Fixge.c;h=c27042df8b20049816f4f9a569c53c6ce880fb5a;hb=7adaa226eaa2401d6bb0dfd38a0d943c9645d7dc;hp=09394ca4fc0c4b35233705cf19141850eb0ac2f1;hpb=2322798bea16ff4092e2361423af6fd451fd1669;p=vpp.git diff --git a/src/plugins/ixge/ixge.c b/src/plugins/ixge/ixge.c index 09394ca4fc0..c27042df8b2 100644 --- a/src/plugins/ixge/ixge.c +++ b/src/plugins/ixge/ixge.c @@ -2238,8 +2238,6 @@ VLIB_REGISTER_NODE (ixge_input_node, static) = { }, }; -VLIB_NODE_FUNCTION_MULTIARCH_CLONE (ixge_input) -CLIB_MULTIARCH_SELECT_FN (ixge_input) /* *INDENT-ON* */ static u8 * @@ -2488,16 +2486,14 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index) round_pow2 (xm->n_descriptors[rt], xm->n_descriptors_per_cache_line); dq->head_index = dq->tail_index = 0; - dq->descriptors = - vlib_physmem_alloc_aligned (vm, xm->physmem_region, &error, - dq->n_descriptors * - sizeof (dq->descriptors[0]), - 128 /* per chip spec */ ); - if (error) - return error; + dq->descriptors = vlib_physmem_alloc_aligned (vm, dq->n_descriptors * + sizeof (dq->descriptors[0]), + 128 /* per chip spec */ ); + if (!dq->descriptors) + return vlib_physmem_last_error (vm); - memset (dq->descriptors, 0, - dq->n_descriptors * sizeof (dq->descriptors[0])); + clib_memset (dq->descriptors, 0, + dq->n_descriptors * sizeof (dq->descriptors[0])); vec_resize (dq->descriptor_buffer_indices, dq->n_descriptors); if (rt == VLIB_RX) @@ -2518,10 +2514,10 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index) { u32 i; - dq->tx.head_index_write_back = vlib_physmem_alloc (vm, - xm->physmem_region, - &error, - CLIB_CACHE_LINE_BYTES); + dq->tx.head_index_write_back = + vlib_physmem_alloc (vm, CLIB_CACHE_LINE_BYTES); + if (!dq->tx.head_index_write_back) + return vlib_physmem_last_error (vm); for (i = 0; i < dq->n_descriptors; i++) dq->descriptors[i].tx = xm->tx_descriptor_template; @@ -2533,9 +2529,7 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index) ixge_dma_regs_t *dr = get_dma_regs (xd, rt, queue_index); u64 a; - a = - vlib_physmem_virtual_to_physical (vm, xm->physmem_region, - dq->descriptors); + a = vlib_physmem_get_pa (vm, dq->descriptors); dr->descriptor_address[0] = a & 0xFFFFFFFF; dr->descriptor_address[1] = a >> (u64) 32; dr->n_descriptor_bytes = dq->n_descriptors * sizeof (dq->descriptors[0]); @@ -2560,8 +2554,7 @@ ixge_dma_init (ixge_device_t * xd, vlib_rx_or_tx_t rt, u32 queue_index) /* Make sure its initialized before hardware can get to it. */ dq->tx.head_index_write_back[0] = dq->head_index; - a = vlib_physmem_virtual_to_physical (vm, xm->physmem_region, - dq->tx.head_index_write_back); + a = vlib_physmem_get_pa (vm, dq->tx.head_index_write_back); dr->tx.head_index_write_back_address[0] = /* enable bit */ 1 | a; dr->tx.head_index_write_back_address[1] = (u64) a >> (u64) 32; } @@ -2723,7 +2716,7 @@ ixge_process (vlib_main_t * vm, vlib_node_runtime_t * rt, vlib_frame_t * f) vec_foreach (xd, xm->devices) { ixge_update_counters (xd); - memset (xd->counters, 0, sizeof (xd->counters)); + clib_memset (xd->counters, 0, sizeof (xd->counters)); } timeout = 30.0; @@ -2795,13 +2788,12 @@ clib_error_t * ixge_init (vlib_main_t * vm) { ixge_main_t *xm = &ixge_main; - clib_error_t *error; xm->vlib_main = vm; - memset (&xm->tx_descriptor_template, 0, - sizeof (xm->tx_descriptor_template)); - memset (&xm->tx_descriptor_template_mask, 0, - sizeof (xm->tx_descriptor_template_mask)); + clib_memset (&xm->tx_descriptor_template, 0, + sizeof (xm->tx_descriptor_template)); + clib_memset (&xm->tx_descriptor_template_mask, 0, + sizeof (xm->tx_descriptor_template_mask)); xm->tx_descriptor_template.status0 = (IXGE_TX_DESCRIPTOR_STATUS0_ADVANCED | IXGE_TX_DESCRIPTOR_STATUS0_IS_ADVANCED | @@ -2814,13 +2806,15 @@ ixge_init (vlib_main_t * vm) | IXGE_TX_DESCRIPTOR_STATUS0_REPORT_STATUS); xm->tx_descriptor_template_mask.status1 &= ~(IXGE_TX_DESCRIPTOR_STATUS1_DONE); - - error = vlib_call_init_function (vm, pci_bus_init); - - return error; + return 0; } -VLIB_INIT_FUNCTION (ixge_init); +/* *INDENT-OFF* */ +VLIB_INIT_FUNCTION (ixge_init) = +{ + .runs_before = VLIB_INITS("pci_bus_init"), +}; +/* *INDENT-ON* */ static void @@ -2848,17 +2842,6 @@ ixge_pci_init (vlib_main_t * vm, vlib_pci_dev_handle_t h) vlib_pci_addr_t *addr = vlib_pci_get_addr (vm, h); vlib_pci_device_info_t *d = vlib_pci_get_device_info (vm, addr, 0); - /* Allocate physmem region for DMA buffers */ - if (xm->physmem_region_allocated == 0) - { - error = vlib_physmem_region_alloc (vm, "ixge decriptors", 2 << 20, 0, - VLIB_PHYSMEM_F_INIT_MHEAP, - &xm->physmem_region); - xm->physmem_region_allocated = 1; - } - if (error) - return error; - error = vlib_pci_map_region (vm, h, 0, &r); if (error) return error; @@ -2867,7 +2850,7 @@ ixge_pci_init (vlib_main_t * vm, vlib_pci_dev_handle_t h) if (vec_len (xm->devices) == 1) { - ixge_input_node.function = ixge_input_multiarch_select (); + ixge_input_node.function = ixge_input; } xd->pci_dev_handle = h;