X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=src%2Fvppinfra%2Fclib.h;h=dac41adb1656cbe001def764d2cf848d9c0fca63;hb=dc812d9a71f2f5105e4aaba50fd98ea3b0b50a9b;hp=8aec1f16beb5862f16ba0d0c47f9bd71417bcdfc;hpb=dd648aac0615c416507de9097b6f50db16ad319c;p=vpp.git

diff --git a/src/vppinfra/clib.h b/src/vppinfra/clib.h
index 8aec1f16beb..dac41adb165 100644
--- a/src/vppinfra/clib.h
+++ b/src/vppinfra/clib.h
@@ -111,6 +111,14 @@
 #define PREDICT_FALSE(x) __builtin_expect((x),0)
 #define PREDICT_TRUE(x) __builtin_expect((x),1)
 
+/*
+ * Compiler barrier
+ *   prevent compiler to reorder memory access accross this boundary
+ *   prevent compiler to cache values in register (force reload)
+ * Not to be confused with CPU memory barrier below
+ */
+#define CLIB_COMPILER_BARRIER() asm volatile ("":::"memory")
+
 /* Full memory barrier (read and write). */
 #define CLIB_MEMORY_BARRIER() __sync_synchronize ()