X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=src%2Fvppinfra%2Fvector.h;h=33e2b6a8773cbcdcc5cbaa0e185e231da42a1432;hb=da5b4efbabae1271e245a5869268a0030d2a8c55;hp=906d8d8fbfdcf1c780461efaedd862408acf9586;hpb=8304933922620cef005b788a36a4d3f2eab45bb5;p=vpp.git diff --git a/src/vppinfra/vector.h b/src/vppinfra/vector.h index 906d8d8fbfd..33e2b6a8773 100644 --- a/src/vppinfra/vector.h +++ b/src/vppinfra/vector.h @@ -66,7 +66,7 @@ #endif #endif -#if defined (__AVX512F__) +#if defined (__AVX512BITALG__) #define CLIB_HAVE_VEC512 #endif @@ -155,6 +155,15 @@ typedef u32 u32x _vector_size (8); typedef u64 u64x _vector_size (8); #endif +/* universal inlines */ +#define _(t, s, c) \ +static_always_inline t##s##x##c \ +t##s##x##c##_zero () \ +{ return (t##s##x##c) {}; } \ + +foreach_vec +#undef _ + #undef _vector_size #define VECTOR_WORD_TYPE(t) t##x @@ -168,7 +177,10 @@ typedef u64 u64x _vector_size (8); #include #endif -#if defined (__AVX512F__) +#if defined (__AVX512BITALG__) +/* Due to power level transition issues, we don't preffer AVX-512 on + Skylake X and CascadeLake CPUs, AVX512BITALG is introduced on + icelake CPUs */ #include #endif