X-Git-Url: https://gerrit.fd.io/r/gitweb?a=blobdiff_plain;f=test%2Ftest_acl_plugin_macip.py;h=611bc73e312e5506024e58db6193c329f0a1d75b;hb=b474380f;hp=8bcef25c49a77129996e442985df638a7753b42e;hpb=b9ef2739dd1e681143e78ada1ffc342ae2fb89b0;p=vpp.git

diff --git a/test/test_acl_plugin_macip.py b/test/test_acl_plugin_macip.py
index 8bcef25c49a..611bc73e312 100644
--- a/test/test_acl_plugin_macip.py
+++ b/test/test_acl_plugin_macip.py
@@ -16,6 +16,7 @@ from framework import VppTestCase, VppTestRunner, running_extended_tests
 from vpp_lo_interface import VppLoInterface
 from vpp_papi_provider import L2_VTR_OP
 from vpp_sub_interface import VppSubInterface, VppDot1QSubint, VppDot1ADSubint
+from vpp_papi_provider import L2_PORT_TYPE
 
 
 class MethodHolder(VppTestCase):
@@ -90,7 +91,8 @@ class MethodHolder(VppTestCase):
 
             # Create BD with MAC learning enabled and put interfaces to this BD
             cls.vapi.sw_interface_set_l2_bridge(
-                cls.loop0.sw_if_index, bd_id=cls.bd_id, bvi=1)
+                cls.loop0.sw_if_index, bd_id=cls.bd_id,
+                port_type=L2_PORT_TYPE.BVI)
             cls.vapi.sw_interface_set_l2_bridge(
                 cls.pg0.sw_if_index, bd_id=cls.bd_id)
             cls.vapi.sw_interface_set_l2_bridge(
@@ -1080,8 +1082,8 @@ class TestMACIP(MethodHolder):
         self.apply_macip_rules(self.create_rules(acl_count=3,
                                                  rules_count=[3, 5, 4]))
 
-        intf.append(VppLoInterface(self, 0))
-        intf.append(VppLoInterface(self, 1))
+        intf.append(VppLoInterface(self))
+        intf.append(VppLoInterface(self))
 
         sw_if_index0 = intf[0].sw_if_index
         self.vapi.macip_acl_interface_add_del(sw_if_index0, 1)
@@ -1103,8 +1105,8 @@ class TestMACIP(MethodHolder):
         self.assertEqual(reply.acls[sw_if_index0], 4294967295)
         self.assertEqual(reply.acls[sw_if_index1], 0)
 
-        intf.append(VppLoInterface(self, 2))
-        intf.append(VppLoInterface(self, 3))
+        intf.append(VppLoInterface(self))
+        intf.append(VppLoInterface(self))
         sw_if_index2 = intf[2].sw_if_index
         sw_if_index3 = intf[3].sw_if_index
         self.vapi.macip_acl_interface_add_del(sw_if_index2, 1)