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862623d)
Change-Id: I7d622e591020a482af68667f4d1ed2056258d2c8
Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
}
#elif defined (__arm__)
}
#elif defined (__arm__)
-#if defined(__ARM_ARCH_7A__)
-always_inline u64 clib_cpu_time_now (void)
+#if defined(__ARM_ARCH_8A__)
+always_inline u64 clib_cpu_time_now (void) /* We may run arm64 in aarch32 mode, to leverage 64bit counter */
{
u64 tsc;
asm volatile("mrrc p15, 0, %Q0, %R0, c9" : "=r" (tsc));
return tsc;
}
{
u64 tsc;
asm volatile("mrrc p15, 0, %Q0, %R0, c9" : "=r" (tsc));
return tsc;
}
+#elif defined(__ARM_ARCH_7A__)
+always_inline u64 clib_cpu_time_now (void)
+{
+ u32 tsc;
+ asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (tsc));
+ return (u64)tsc;
+}
#else
always_inline u64 clib_cpu_time_now (void)
{
#else
always_inline u64 clib_cpu_time_now (void)
{