for testing purposes, disabled by default
Type: improvement
Signed-off-by: Damjan Marion <damarion@cisco.com>
Change-Id: Id616e2b3b21ae0f0b44e2b55ecefd501afacc7f2
+ add_vpp_march_variant(scalar
+ FLAGS -march=core2 -mno-mmx -mno-sse
+ OFF
+ )
+
if (GNU_ASSEMBLER_AVX512_BUG)
message(WARNING "AVX-512 multiarch variant(s) disabled due to GNU Assembler bug")
else()
if (GNU_ASSEMBLER_AVX512_BUG)
message(WARNING "AVX-512 multiarch variant(s) disabled due to GNU Assembler bug")
else()
#if defined(__x86_64__)
#define foreach_march_variant \
#if defined(__x86_64__)
#define foreach_march_variant \
+ _ (scalar, "Generic (SIMD disabled)") \
_ (hsw, "Intel Haswell") \
_ (trm, "Intel Tremont") \
_ (skx, "Intel Skylake (server) / Cascade Lake") \
_ (hsw, "Intel Haswell") \
_ (trm, "Intel Tremont") \
_ (skx, "Intel Skylake (server) / Cascade Lake") \
+static inline int
+clib_cpu_march_priority_scalar ()
+{
+ return 1;
+}
+
static inline int
clib_cpu_march_priority_spr ()
{
static inline int
clib_cpu_march_priority_spr ()
{
*(u64u *) d = *(u64u *) s;
}
*(u64u *) d = *(u64u *) s;
}
static_always_inline void
clib_memcpy16 (void *d, void *s)
{
static_always_inline void
clib_memcpy16 (void *d, void *s)
{
*(u8x16u *) d = *(u8x16u *) s;
*(u8x16u *) d = *(u8x16u *) s;
+#else
+ clib_memcpy8 (d, s);
+ clib_memcpy8 (d + 8, s + 8);
#ifdef CLIB_HAVE_VEC256
static_always_inline void
#ifdef CLIB_HAVE_VEC256
static_always_inline void
#include <vppinfra/format.h>
#include <vppinfra/test/test.h>
#include <vppinfra/format.h>
#include <vppinfra/test/test.h>
-#include <vppinfra/vector/mask_compare.h>
+#include <vppinfra/memcpy_x86_64.h>
__test_funct_fn void
wrapper (u8 *dst, u8 *src, uword n)
__test_funct_fn void
wrapper (u8 *dst, u8 *src, uword n)