#include <common.h>
struct roc_model oct_model;
+oct_main_t oct_main;
VLIB_REGISTER_LOG_CLASS (oct_log, static) = {
.class_name = "octeon",
#undef _
};
+static vnet_dev_arg_t oct_drv_args[] = {
+ {
+ .id = OCT_DRV_ARG_NPA_MAX_POOLS,
+ .name = "npa_max_pools",
+ .desc = "Max NPA pools",
+ .type = VNET_DEV_ARG_TYPE_UINT32,
+ .default_val.uint32 = 128,
+ },
+ {
+ .id = OCT_DRV_ARG_END,
+ .name = "end",
+ .desc = "Argument end",
+ .type = VNET_DEV_ARG_END,
+ },
+};
+
static vnet_dev_arg_t oct_port_args[] = {
{
.id = OCT_PORT_ARG_EN_ETH_PAUSE_FRAME,
return VNET_DEV_ERR_UNSUPPORTED_DEVICE;
}
+static vnet_dev_rv_t
+oct_config_args (vlib_main_t *vm, vnet_dev_driver_t *drv)
+{
+ if (!oct_main.is_config_done)
+ {
+ foreach_vnet_dev_port_args (arg, drv)
+ {
+ if (arg->id == OCT_DRV_ARG_NPA_MAX_POOLS &&
+ vnet_dev_arg_get_uint32 (arg))
+ oct_main.npa_max_pools = vnet_dev_arg_get_uint32 (arg);
+ }
+ oct_main.is_config_done = 1;
+ }
+ else
+ {
+ log_err (NULL, "Driver config arguments are already initialized or "
+ "devices are already initialized");
+ return VNET_DEV_ERR_UNSUPPORTED_CONFIG;
+ }
+
+ return 0;
+}
+
static vnet_dev_rv_t
oct_alloc (vlib_main_t *vm, vnet_dev_t *dev)
{
vlib_pci_config_hdr_t pci_hdr;
vnet_dev_rv_t rv;
+ /*
+ * Drivers config arguments should be initialized by this time
+ * otherwise don't allow to set after device init
+ */
+ if (!oct_main.is_config_done)
+ oct_main.is_config_done = 1;
+
rv = vnet_dev_pci_read_config_header (vm, dev, &pci_hdr);
if (rv != VNET_DEV_OK)
return rv;
.bus = "pci",
.device_data_sz = sizeof (oct_device_t),
.ops = {
+ .config_args = oct_config_args,
.alloc = oct_alloc,
.init = oct_init,
.deinit = oct_deinit,
.probe = oct_probe,
},
.args = oct_dev_args,
+ .drv_args = oct_drv_args,
};
+static int
+oct_npa_max_pools_set_cb (struct plt_pci_device *pci_dev)
+{
+ roc_idev_npa_maxpools_set (oct_main.npa_max_pools);
+ return 0;
+}
+
static clib_error_t *
oct_plugin_init (vlib_main_t *vm)
{
return clib_error_return (0, "OCTEON model is not OCTEON10");
#endif
+ /* set default values in oct_main */
+ oct_main.npa_max_pools = OCT_NPA_MAX_POOLS;
+
+ roc_npa_lf_init_cb_register (oct_npa_max_pools_set_cb);
+
return 0;
}
#include <base/roc_api.h>
#include <dev_octeon/hw_defs.h>
+#define OCT_NPA_MAX_POOLS 128
#define OCT_BATCH_ALLOC_IOVA0_MASK 0xFFFFFFFFFFFFFF80
+typedef enum
+{
+ OCT_DRV_ARG_NPA_MAX_POOLS = 1,
+ OCT_DRV_ARG_END,
+} oct_drv_args_t;
+
typedef enum
{
OCT_PORT_ARG_EN_ETH_PAUSE_FRAME = 1,
struct roc_nix_sq sq;
} oct_txq_t;
+typedef struct
+{
+ u8 is_config_done;
+ u32 npa_max_pools;
+} oct_main_t;
+
+extern oct_main_t oct_main;
+
/* format.c */
format_function_t format_oct_port_status;
format_function_t format_oct_rx_trace;