#undef _
};
+static vnet_dev_arg_t oct_port_args[] = {
+ {
+ .id = OCT_PORT_ARG_EN_ETH_PAUSE_FRAME,
+ .name = "eth_pause_frame",
+ .desc = "Enable ethernet pause frame support, applicable to network "
+ "devices only",
+ .type = VNET_DEV_ARG_TYPE_BOOL,
+ .default_val.boolean = false,
+ },
+ {
+ .id = OCT_PORT_ARG_END,
+ .name = "end",
+ .desc = "Argument end",
+ .type = VNET_DEV_ARG_END,
+ },
+};
+
static vnet_dev_arg_t oct_dev_args[] = {
{
.id = OCT_DEV_ARG_CRYPTO_N_DESC,
},
.data_size = sizeof (oct_port_t),
.initial_data = &oct_port,
+ .args = oct_port_args,
},
.rx_node = &oct_rx_node,
.tx_node = &oct_tx_node,
#define OCT_BATCH_ALLOC_IOVA0_MASK 0xFFFFFFFFFFFFFF80
+typedef enum
+{
+ OCT_PORT_ARG_EN_ETH_PAUSE_FRAME = 1,
+ OCT_PORT_ARG_END
+} oct_port_args_t;
+
typedef enum
{
OCT_DEV_ARG_CRYPTO_N_DESC = 1,
vnet_dev_port_interfaces_t *ifs = port->interfaces;
u8 mac_addr[PLT_ETHER_ADDR_LEN];
struct roc_nix *nix = cd->nix;
+ bool is_pause_frame_enable = false;
vnet_dev_rv_t rv;
int rrv;
log_debug (dev, "port init: port %u", port->port_id);
+ foreach_vnet_dev_port_args (arg, port)
+ {
+ if (arg->id == OCT_PORT_ARG_EN_ETH_PAUSE_FRAME &&
+ vnet_dev_arg_get_bool (arg))
+ is_pause_frame_enable = true;
+ }
+
if ((rrv = roc_nix_lf_alloc (nix, ifs->num_rx_queues, ifs->num_tx_queues,
rxq_cfg)))
{
}
/* Configure pause frame flow control*/
- if ((rv = oct_port_pause_flow_control_init (vm, port)))
+
+ if (is_pause_frame_enable &&
+ (rv = oct_port_pause_flow_control_init (vm, port)))
{
oct_port_deinit (vm, port);
return rv;