Adjust buffer allocation so it always have odd number of cache lines.
That should result in better distribution of cachelines among cache sets.
Type: improvement
Change-Id: I0d39d4cf01cff36ad6f70a700730823a96448c22
Signed-off-by: Damjan Marion <damarion@cisco.com>
static uword
vlib_buffer_alloc_size (uword ext_hdr_size, uword data_size)
{
- return CLIB_CACHE_LINE_ROUND (ext_hdr_size + sizeof (vlib_buffer_t) +
- data_size);
+ uword alloc_size = ext_hdr_size + sizeof (vlib_buffer_t) + data_size;
+ alloc_size = CLIB_CACHE_LINE_ROUND (alloc_size);
+
+ /* in case when we have even number of cachelines, we add one more for
+ * better cache occupancy */
+ alloc_size |= CLIB_CACHE_LINE_BYTES;
+
+ return alloc_size;
}
u8