From: Zhiyong Yang <zhiyong.yang@intel.com>
Date: Mon, 5 Nov 2018 08:45:25 +0000 (-0500)
Subject: vxlan: prefetch extra one cacheline holding external header
X-Git-Tag: v19.04-rc0~462
X-Git-Url: https://gerrit.fd.io/r/gitweb?a=commitdiff_plain;h=b0073e276d9e12f02f8f9874fd09ae532a0baa47;hp=b0073e276d9e12f02f8f9874fd09ae532a0baa47;p=vpp.git

vxlan: prefetch extra one cacheline holding external header

For vxlan_encap, code will touch memory area before the field "data"
in struct vlib_buffer_t, however so far it is not prefetched in cache
yet for this graph node.
After applying the patch, 2~3 cycles per pkt for vxlan4_encap can be
saved on Haswell. It will bring a lot of benefits on DVN platform too.

Change-Id: I26d8c57fb3d2415726be5367117d73eb715e35ad
Signed-off-by: Zhiyong Yang <zhiyong.yang@intel.com>
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