docs/lab/testbeds_sm_skx_hw_bios_cfg.md

   1 <!-- TOC depthFrom:1 depthTo:6 withLinks:1 updateOnSave:1 orderedList:0 -->
   2
   3         - [SuperMicro Xeon Skylake Servers - Hardware and BIOS Configuration](#supermicro-xeon-skylake-servers-hardware-and-bios-configuration)
   4                 - [Linux lscpu TODO](#linux-lscpu-todo)
   5                 - [Linux dmidecode pci TODO](#linux-dmidecode-pci-todo)
   6                 - [Linux dmidecode memory TODO](#linux-dmidecode-memory-todo)
   7                 - [Xeon Skx Server BIOS Configuration](#xeon-skx-server-bios-configuration)
   8                         - [Boot Feature](#boot-feature)
   9                         - [CPU Configuration](#cpu-configuration)
  10                                 - [Advanced Power Management Configuration](#advanced-power-management-configuration)
  11                                         - [CPU P State Control](#cpu-p-state-control)
  12                                         - [Hardware PM State Control](#hardware-pm-state-control)
  13                                         - [CPU C State Control](#cpu-c-state-control)
  14                                         - [Package C State Control](#package-c-state-control)
  15                                         - [CPU T State Control](#cpu-t-state-control)
  16                                 - [Chipset Configuration](#chipset-configuration)
  17                                         - [North Bridge](#north-bridge)
  18                                         - [UPI Configuration](#upi-configuration)
  19                                         - [Memory Configuration](#memory-configuration)
  20                                         - [IIO Configuration](#iio-configuration)
  21                                         - [CPU1 Configuration](#cpu1-configuration)
  22                                         - [CPU2 Configuration](#cpu2-configuration)
  23                                 - [South Bridge](#south-bridge)
  24                         - [PCIe/PCI/PnP Configuration](#pciepcipnp-configuration)
  25                         - [ACPI Settings](#acpi-settings)
  26                         - [DMIDECODE](#dmidecode)
  27                 - [Xeon Skx Server Firmware Inventory](#xeon-skx-server-firmware-inventory)
  28
  29 <!-- /TOC -->
  30
  31 ## SuperMicro Xeon Skylake Servers - Hardware and BIOS Configuration
  32
  33 ### Linux lscpu TODO
  34
  35 ### Linux dmidecode pci TODO
  36
  37 ### Linux dmidecode memory TODO
  38
  39 ### Xeon Skx Server BIOS Configuration
  40
  41 #### Boot Feature
  42
  43 ```
  44   |  Quiet Boot                                [Enabled]               |Boot option                  |
  45   |                                                                    |                             |
  46   |  Option ROM Messages                       [Force BIOS]            |                             |
  47   |  Bootup NumLock State                      [On]                    |                             |
  48   |  Wait For "F1" If Error                    [Enabled]               |                             |
  49   |  INT19 Trap Response                       [Immediate]             |                             |
  50   |  Re-try Boot                               [Disabled]              |                             |
  51   |  Install Windows 7 USB support             [Disabled]              |                             |
  52   |  Port 61h Bit-4 Emulation                  [Disabled]              |                             |
  53   |                                                                    |                             |
  54   |  Power Configuration                                               |                             |
  55   |  Watch Dog Function                        [Disabled]              |                             |
  56   |  Restore on AC Power Loss                  [Last State]            |                             |
  57   |  Power Button Function                     [Instant Off]           |                             |
  58   |  Throttle on Power Fail                    [Disabled]              |                             |
  59 ```
  60
  61 #### CPU Configuration
  62
  63 ```
  64   |  Processor Configuration                                           |Enables Hyper Threading      |
  65   |  --------------------------------------------------                |(Software Method to          |
  66   |  Processor BSP Revision                    50654 - SKX H0          |Enable/Disable Logical       |
  67   |  Processor Socket                          CPU1      |  CPU2       |Processor threads.           |
  68   |  Processor ID                              00050654* |  000506...  |                             |
  69   |  Processor Frequency                       2.500GHz  |  2.500GHz   |                             |
  70   |  Processor Max Ratio                            19H  |  19H        |                             |
  71   |  Processor Min Ratio                            0AH  |  0AH        |                             |
  72   |  Microcode Revision                        02000030                |                             |
  73   |  L1 Cache RAM                                  64KB  |      64KB   |                             |
  74   |  L2 Cache RAM                                1024KB  |    1024KB   |                             |
  75   |  L3 Cache RAM                               39424KB  |   39424KB   |                             |
  76   |  Processor 0 Version                                               |                             |
  77   |  Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz                      |                             |
  78   |  Processor 1 Version                                               |                             |
  79   |  Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz                      |                             |
  80   |                                                                    |                             |
  81   |  Hyper-Threading [ALL]                     [Enable]                |                             |
  82   |  Core Disable Bitmap(Hex)                  0                       |                             |
  83   |  Execute Disable Bit                       [Enable]                |                             |
  84   |  Intel Virtualization Technology           [Enable]                |                             |
  85   |  PPIN Control                              [Unlock/Enable]         |                             |
  86   |  Hardware Prefetcher                       [Enable]                |                             |
  87   |  Adjacent Cache Prefetch                   [Enable]                |                             |
  88   |  DCU Streamer Prefetcher                   [Enable]                |                             |
  89   |  DCU IP Prefetcher                         [Enable]                |                             |
  90   |  LLC Prefetch                              [Disable]               |                             |
  91   |  Extended APIC                             [Disable]               |                             |
  92   |  AES-NI                                    [Enable]                |                             |
  93   |> Advanced Power Management Configuration                           |                             |
  94 ```
  95
  96 ##### Advanced Power Management Configuration
  97
  98 ```
  99   |  Advanced Power Management Configuration                           |Switch CPU Power Management  |
 100   |  --------------------------------------------------                |profile                      |
 101   |  Power Technology                          [Custom]                |                             |
 102   |  Power Performance Tuning                  [BIOS Controls EPB]     |                             |
 103   |  ENERGY_PERF_BIAS_CFG mode                 [Maximum Performance]   |                             |
 104   |> CPU P State Control                                               |                             |
 105   |> Hardware PM State Control                                         |                             |
 106   |> CPU C State Control                                               |                             |
 107   |> Package C State Control                                           |                             |
 108   |> CPU T State Control                                               |                             |
 109 ```
 110
 111 ###### CPU P State Control
 112
 113 ```
 114   |  CPU P State Control                                               |Enable/Disable EIST          |
 115   |                                                                    |(P-States)                   |
 116   |  SpeedStep (Pstates)                       [Disable]               |                             |
 117   |  EIST PSD Function                         [HW_ALL]                |                             |
 118 ```
 119
 120 ###### Hardware PM State Control
 121
 122 ```
 123   |  Hardware PM State Control                                         |Disable: Hardware chooses a  |
 124   |                                                                    |P-state based on OS Request  |
 125   |  Hardware P-States                         [Disable]               |(Legacy P-States)            |
 126   |                                                                    |Native Mode:Hardware         |
 127   |                                                                    |chooses a P-state based on   |
 128   |                                                                    |OS guidance                  |
 129   |                                                                    |Out of Band Mode:Hardware    |
 130   |                                                                    |autonomously chooses a       |
 131   |                                                                    |P-state (no OS guidance)     |
 132 ```
 133
 134 ###### CPU C State Control
 135
 136 ```
 137   |  CPU C State Control                                               |Autonomous Core C-State      |
 138   |                                                                    |Control                      |
 139   |  Autonomous Core C-State                   [Disable]               |                             |
 140   |  CPU C6 report                             [Disable]               |                             |
 141   |  Enhanced Halt State (C1E)                 [Disable]               |                             |
 142 ```
 143
 144 ###### Package C State Control
 145
 146 ```
 147   |  Package C State Control                                           |Package C State limit        |
 148   |                                                                    |                             |
 149   |  Package C State                           [C0/C1 state]           |                             |
 150 ```
 151
 152 ###### CPU T State Control
 153
 154 ```
 155   |  CPU T State Control                                               |Enable/Disable Software      |
 156   |                                                                    |Controlled T-States          |
 157   |  Software Controlled T-States              [Disable]               |                             |
 158 ```
 159
 160 ##### Chipset Configuration
 161
 162 ```
 163   |  WARNING: Setting wrong values in below sections may cause         |North Bridge Parameters      |
 164   |           system to malfunction.                                   |                             |
 165   |> North Bridge                                                      |                             |
 166   |> South Bridge                                                      |                             |
 167 ```
 168
 169 ###### North Bridge
 170
 171 ```
 172   |> UPI Configuration                                                 |Displays and provides        |
 173   |> Memory Configuration                                              |option to change the UPI     |
 174   |> IIO Configuration                                                 |Settings                     |
 175 ```
 176
 177 ###### UPI Configuration
 178
 179 ```
 180   |  UPI Configuration                                                 |Choose Topology Precedence   |
 181   |  --------------------------------------------------                |to degrade features if       |
 182   |  Number of CPU                             2                       |system options are in        |
 183   |  Number of Active UPI Link                 3                       |conflict or choose Feature   |
 184   |  Current UPI Link Speed                    Fast                    |Precedence to degrade        |
 185   |  Current UPI Link Frequency                10.4 GT/s               |topology if system options   |
 186   |  UPI Global MMIO Low Base / Limit          90000000 / FBFFFFFF     |are in conflict.             |
 187   |  UPI Global MMIO High Base / Limit         0000000000000000 / ...  |                             |
 188   |  UPI Pci-e Configuration Base / Size       80000000 / 10000000     |                             |
 189   |  Degrade Precedence                        [Topology Precedence]   |                             |
 190   |  Link L0p Enable                           [Disable]               |                             |
 191   |  Link L1 Enable                            [Disable]               |                             |
 192   |  IO Directory Cache (IODC)                 [Auto]                  |                             |
 193   |  SNC                                       [Disable]               |                             |
 194   |  XPT Prefetch                              [Disable]               |                             |
 195   |  KTI Prefetch                              [Enable]                |                             |
 196   |  Local/Remote Threshold                    [Auto]                  |                             |
 197   |  Stale AtoS                                [Disable]               |                             |
 198   |  LLC dead line alloc                       [Enable]                |                             |
 199   |  Isoc Mode                                 [Auto]                  |                             |
 200 ```
 201
 202 ###### Memory Configuration
 203
 204 ```
 205   |                                                                    |POR - Enforces Plan Of       |
 206   |  --------------------------------------------------                |Record restrictions for      |
 207   |  Integrated Memory Controller (iMC)                                |DDR4 frequency and voltage   |
 208   |  --------------------------------------------------                |programming. Disable -       |
 209   |                                                                    |Disables this feature.       |
 210   |  Enforce POR                               [Disable]               |                             |
 211   |  Memory Frequency                          [2666]                  |                             |
 212   |  Data Scrambling for NVMDIMM               [Auto]                  |                             |
 213   |  Data Scrambling for DDR4                  [Auto]                  |                             |
 214   |  tCCD_L Relaxation                         [Auto]                  |                             |
 215   |  Memory tRWSR Relaxation                   [Enable]                |                             |
 216   |  2X REFRESH                                [Auto]                  |                             |
 217   |  Page Policy                               [Auto]                  |                             |
 218   |  IMC Interleaving                          [2-way Interleave]      |                             |
 219   |> Memory Topology                                                   |                             |
 220   |> Memory RAS Configuration                                          |                             |
 221 ```
 222
 223 ###### IIO Configuration
 224
 225 ```
 226   |  IIO Configuration                                                 |Expose IIO DFX devices and   |
 227   |  --------------------------------------------------                |other CPU devices like PMON  |
 228   |                                                                    |                             |
 229   |  EV DFX Features                           [Disable]               |                             |
 230   |> CPU1 Configuration                                                |                             |
 231   |> CPU2 Configuration                                                |                             |
 232   |> IOAT Configuration                                                |                             |
 233   |> Intel. VT for Directed I/O (VT-d)                                 |                             |
 234   |> Intel. VMD technology                                             |                             |
 235   |                                                                    |                             |
 236   |   IIO-PCIE Express Global Options                                  |                             |
 237   |  ========================================                          |                             |
 238   |  PCI-E Completion Timeout Disable          [No]                    |                             |
 239 ```
 240
 241 ###### CPU1 Configuration
 242
 243 ```
 244   |  IOU0 (IIO PCIe Br1)                       [Auto]                  |Selects PCIe port            |
 245   |  IOU1 (IIO PCIe Br2)                       [Auto]                  |Bifurcation for selected     |
 246   |  IOU2 (IIO PCIe Br3)                       [Auto]                  |slot(s)                      |
 247   |> CPU1 SLOT2 PCI-E 3.0 X16                                          |                             |
 248   |> CPU1 SLOT4 PCI-E 3.0 X16                                          |                             |
 249   |> CPU1 SLOT9 PCI-E 3.0 X16                                          |                             |
 250 ```
 251
 252 ###### CPU2 Configuration
 253
 254 ```
 255   |  IOU0 (IIO PCIe Br1)                       [Auto]                  |Selects PCIe port            |
 256   |  IOU1 (IIO PCIe Br2)                       [Auto]                  |Bifurcation for selected     |
 257   |  IOU2 (IIO PCIe Br3)                       [Auto]                  |slot(s)                      |
 258   |> CPU2 SLOT6 PCI-E 3.0 X16                                          |                             |
 259   |> CPU2 SLOT8 PCI-E 3.0 X16                                          |                             |
 260   |> CPU2 SLOT10 PCI-E 3.0 X16                                         |                             |
 261 ```
 262
 263 ##### South Bridge
 264
 265 ```
 266   |                                                                    |Enables Legacy USB support.  |
 267   |  USB Module Version                        17                      |AUTO option disables legacy  |
 268   |                                                                    |support if no USB devices    |
 269   |  USB Devices:                                                      |are connected. DISABLE       |
 270   |        1 Keyboard, 1 Mouse, 1 Hub                                  |option will keep USB         |
 271   |                                                                    |devices available only for   |
 272   |  Legacy USB Support                        [Enabled]               |EFI applications.            |
 273   |  XHCI Hand-off                             [Disabled]              |                             |
 274   |  Port 60/64 Emulation                      [Enabled]               |                             |
 275   |  PCIe PLL SSC                              [Disable]               |                             |
 276   |  Real USB Wake Up                          [Enabled]               |                             |
 277   |  Front USB Wake Up                         [Enabled]               |                             |
 278   |                                                                    |                             |
 279   |  Azalia                                    [Auto]                  |                             |
 280   |    Azalia PME Enable                       [Disabled]              |                             |
 281 ```
 282
 283 #### PCIe/PCI/PnP Configuration
 284
 285 ```
 286   |  PCI Bus Driver Version                    A5.01.12                |Enables or Disables 64bit    |
 287   |                                                                    |capable Devices to be        |
 288   |  PCI Devices Common Settings:                                      |Decoded in Above 4G Address  |
 289   |  Above 4G Decoding                         [Enabled]               |Space (Only if System        |
 290   |  SR-IOV Support                            [Enabled]               |Supports 64 bit PCI          |
 291   |  MMIO High Base                            [56T]                   |Decoding).                   |
 292   |  MMIO High Granularity Size                [256G]                  |                             |
 293   |  Maximum Read Request                      [Auto]                  |                             |
 294   |  MMCFG Base                                [2G]                    |                             |
 295   |  NVMe Firmware Source                      [Vendor Defined Fi...]  |                             |
 296   |  VGA Priority                              [Onboard]               |                             |
 297   |  CPU1 SLOT2 PCI-E 3.0 X16 OPROM            [Legacy]                |                             |
 298   |  CPU1 SLOT4 PCI-E 3.0 X16 OPROM            [Legacy]                |                             |
 299   |  CPU2 SLOT6 PCI-E 3.0 X16 OPROM            [Legacy]                |                             |
 300   |  CPU2 SLOT8 PCI-E 3.0 X16 OPROM            [Legacy]                |                             |
 301   |  CPU1 SLOT9 PCI-E 3.0 X16 OPROM            [Legacy]                |                             |
 302   |  CPU2 SLOT10 PCI-E 3.0 X16 OPROM           [Legacy]                |                             |
 303   |  CPU2 SLOT11 PCI-E 3.0 X4(IN X8) OPROM     [Legacy]                |                             |
 304   |  M.2 CONNECTOR OPROM                       [Legacy]                |                             |
 305   |  Onboard LAN1 Option ROM                   [Legacy]                |                             |
 306   |  Onboard LAN2 Option ROM                   [Disabled]              |                             |
 307   |  Onboard Video Option ROM                  [Legacy]                |                             |
 308   |> Network Stack Configuration                                       |                             |
 309 ```
 310
 311 #### ACPI Settings
 312
 313 ```
 314   |  ACPI Settings                                                     |Enable or Disable Non        |
 315   |                                                                    |uniform Memory Access        |
 316   |  NUMA                                      [Enabled]               |(NUMA).                      |
 317   |  WHEA Support                              [Enabled]               |                             |
 318   |  High Precision Event Timer                [Enabled]               |                             |
 319   |  ACPI Sleep State                          [S3 (Suspend to RAM)]   |                             |
 320 ```
 321
 322 #### DMIDECODE
 323
 324 ```
 325   # dmidecode 3.1
 326   Getting SMBIOS data from sysfs.
 327   SMBIOS 3.1.1 present.
 328   Table at 0x000E89C0.
 329
 330   Handle 0x0000, DMI type 0, 26 bytes
 331   BIOS Information
 332         Vendor: American Megatrends Inc.
 333         Version: 2.0
 334         Release Date: 11/29/2017
 335         Address: 0xF0000
 336         Runtime Size: 64 kB
 337         ROM Size: 64 MB
 338         Characteristics:
 339                 PCI is supported
 340                 BIOS is upgradeable
 341                 BIOS shadowing is allowed
 342                 Boot from CD is supported
 343                 Selectable boot is supported
 344                 BIOS ROM is socketed
 345                 EDD is supported
 346                 5.25"/1.2 MB floppy services are supported (int 13h)
 347                 3.5"/720 kB floppy services are supported (int 13h)
 348                 3.5"/2.88 MB floppy services are supported (int 13h)
 349                 Print screen service is supported (int 5h)
 350                 Serial services are supported (int 14h)
 351                 Printer services are supported (int 17h)
 352                 ACPI is supported
 353                 USB legacy is supported
 354                 BIOS boot specification is supported
 355                 Targeted content distribution is supported
 356                 UEFI is supported
 357         BIOS Revision: 5.12
 358
 359   Handle 0x0001, DMI type 1, 27 bytes
 360   System Information
 361         Manufacturer: Supermicro
 362         Product Name: SYS-7049GP-TRT
 363         Version: 0123456789
 364         Serial Number: S291427X8332242
 365         UUID: 00000000-0000-0000-0000-AC1F6B8A8DB6
 366         Wake-up Type: Power Switch
 367         SKU Number: To be filled by O.E.M.
 368         Family: To be filled by O.E.M.
 369
 370   Handle 0x0002, DMI type 2, 15 bytes
 371   Base Board Information
 372         Manufacturer: Supermicro
 373         Product Name: X11DPG-QT
 374         Version: 1.02
 375         Serial Number: VM183S014930
 376         Asset Tag: To be filled by O.E.M.
 377         Features:
 378                 Board is a hosting board
 379                 Board is replaceable
 380         Location In Chassis: To be filled by O.E.M.
 381         Chassis Handle: 0x0003
 382         Type: Motherboard
 383         Contained Object Handles: 0
 384
 385   Handle 0x0003, DMI type 3, 22 bytes
 386   Chassis Information
 387         Manufacturer: Supermicro
 388         Type: Other
 389         Lock: Not Present
 390         Version: 0123456789
 391         Serial Number: C7470KH06A20167
 392         Asset Tag: To be filled by O.E.M.
 393         Boot-up State: Safe
 394         Power Supply State: Safe
 395         Thermal State: Safe
 396         Security Status: None
 397         OEM Information: 0x00000000
 398
 399   Handle 0x0050, DMI type 4, 48 bytes
 400   Processor Information
 401         Socket Designation: CPU1
 402         Type: Central Processor
 403         Family: Xeon
 404         Manufacturer: Intel(R) Corporation
 405         ID: 54 06 05 00 FF FB EB BF
 406         Signature: Type 0, Family 6, Model 85, Stepping 4
 407         Flags:
 408                 FPU (Floating-point unit on-chip)
 409                 VME (Virtual mode extension)
 410                 DE (Debugging extension)
 411                 PSE (Page size extension)
 412                 TSC (Time stamp counter)
 413                 MSR (Model specific registers)
 414                 PAE (Physical address extension)
 415                 MCE (Machine check exception)
 416                 CX8 (CMPXCHG8 instruction supported)
 417                 APIC (On-chip APIC hardware supported)
 418                 SEP (Fast system call)
 419                 MTRR (Memory type range registers)
 420                 PGE (Page global enable)
 421                 MCA (Machine check architecture)
 422                 CMOV (Conditional move instruction supported)
 423                 PAT (Page attribute table)
 424                 PSE-36 (36-bit page size extension)
 425                 CLFSH (CLFLUSH instruction supported)
 426                 DS (Debug store)
 427                 ACPI (ACPI supported)
 428                 MMX (MMX technology supported)
 429                 FXSR (FXSAVE and FXSTOR instructions supported)
 430                 SSE (Streaming SIMD extensions)
 431                 SSE2 (Streaming SIMD extensions 2)
 432                 SS (Self-snoop)
 433                 HTT (Multi-threading)
 434                 TM (Thermal monitor supported)
 435                 PBE (Pending break enabled)
 436         Version: Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz
 437         Voltage: 1.6 V
 438         External Clock: 100 MHz
 439         Max Speed: 4000 MHz
 440         Current Speed: 2500 MHz
 441         Status: Populated, Enabled
 442         Upgrade: Other
 443         L1 Cache Handle: 0x004D
 444         L2 Cache Handle: 0x004E
 445         L3 Cache Handle: 0x004F
 446         Serial Number: Not Specified
 447         Asset Tag: UNKNOWN
 448         Part Number: Not Specified
 449         Core Count: 28
 450         Core Enabled: 28
 451         Thread Count: 56
 452         Characteristics:
 453                 64-bit capable
 454                 Multi-Core
 455                 Hardware Thread
 456                 Execute Protection
 457                 Enhanced Virtualization
 458                 Power/Performance Control
 459
 460
 461   Handle 0x0054, DMI type 4, 48 bytes
 462   Processor Information
 463         Socket Designation: CPU2
 464         Type: Central Processor
 465         Family: Xeon
 466         Manufacturer: Intel(R) Corporation
 467         ID: 54 06 05 00 FF FB EB BF
 468         Signature: Type 0, Family 6, Model 85, Stepping 4
 469         Flags:
 470                 FPU (Floating-point unit on-chip)
 471                 VME (Virtual mode extension)
 472                 DE (Debugging extension)
 473                 PSE (Page size extension)
 474                 TSC (Time stamp counter)
 475                 MSR (Model specific registers)
 476                 PAE (Physical address extension)
 477                 MCE (Machine check exception)
 478                 CX8 (CMPXCHG8 instruction supported)
 479                 APIC (On-chip APIC hardware supported)
 480                 SEP (Fast system call)
 481                 MTRR (Memory type range registers)
 482                 PGE (Page global enable)
 483                 MCA (Machine check architecture)
 484                 CMOV (Conditional move instruction supported)
 485                 PAT (Page attribute table)
 486                 PSE-36 (36-bit page size extension)
 487                 CLFSH (CLFLUSH instruction supported)
 488                 DS (Debug store)
 489                 ACPI (ACPI supported)
 490                 MMX (MMX technology supported)
 491                 FXSR (FXSAVE and FXSTOR instructions supported)
 492                 SSE (Streaming SIMD extensions)
 493                 SSE2 (Streaming SIMD extensions 2)
 494                 SS (Self-snoop)
 495                 HTT (Multi-threading)
 496                 TM (Thermal monitor supported)
 497                 PBE (Pending break enabled)
 498         Version: Intel(R) Xeon(R) Platinum 8180 CPU @ 2.50GHz
 499         Voltage: 1.6 V
 500         External Clock: 100 MHz
 501         Max Speed: 4000 MHz
 502         Current Speed: 2500 MHz
 503         Status: Populated, Enabled
 504         Upgrade: Other
 505         L1 Cache Handle: 0x0051
 506         L2 Cache Handle: 0x0052
 507         L3 Cache Handle: 0x0053
 508         Serial Number: Not Specified
 509         Asset Tag: UNKNOWN
 510         Part Number: Not Specified
 511         Core Count: 28
 512         Core Enabled: 28
 513         Thread Count: 56
 514         Characteristics:
 515                 64-bit capable
 516                 Multi-Core
 517                 Hardware Thread
 518                 Execute Protection
 519                 Enhanced Virtualization
 520                 Power/Performance Control
 521 ```
 522
 523 ### Xeon Skx Server Firmware Inventory
 524
 525 ```
 526 Host.           IPMI IP.      BIOS. CPLD.     Aptio SU.   CPU Microcode.  PCI Bus.   ME Operation FW.    X710 Firmware.            XXV710 Firmware.          i40e.
 527 s1-t11-sut1.    10.30.50.47.  2.1.  03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 528 s2-t12-sut1.    10.30.50.48.  2.1.  03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 529 s3-t21-sut1.    10.30.50.41.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 530 s4-t21-tg1.     10.30.50.42.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 531 s5-t22-sut1.    10.30.50.49.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 532 s6-t22-tg1.     10.30.50.50.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 533 s7-t23-sut1.    10.30.50.51.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 534 s8-t23-tg1.     10.30.50.52.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 535 s9-t24-sut1.    10.30.50.53.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 536 s10-t24-tg1.    10.30.50.54.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 537 s11-t31-sut1.   10.30.50.43.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 538 s12-t31-sut2.   10.30.50.44.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 539 s13-t31-tg1.    10.30.50.45.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 540 s14-t32-sut1.   10.30.50.55.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 541 s15-t32-sut2.   10.30.50.56.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 542 s16-t32-tg1.    10.30.50.57.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 543 s19-t33t34-tg1. 10.30.50.46.  2.0b. 03.B1.03. 2.19.1268.  02000043.       A5.01.12.  4.0.4.294.          6.01 0x80003554 1.1747.0. 6.01 0x80003554 1.1747.0. 2.1.14-k.
 544 ```