feat(Docs): Update few sections
[csit.git] / docs / report / introduction / methodology_mellanox_nic.rst
1 Mellanox NIC
2 ------------
3
4 Performance test results using Mellanox ConnectX5 2p100GE are reported for
5 2-Node Xeon Cascade Lake physical testbed type present in FD.io labs. For
6 description of physical testbeds used please refer to
7 :ref:`tested_physical_topologies`.
8
9 Mellanox NIC settings
10 ~~~~~~~~~~~~~~~~~~~~~
11
12 Mellanox ConnectX5 NIC settings are following recommendations from
13 [DpdkPerformanceReport]_, [MellanoxDpdkGuide]_ and [MellanoxDpdkBits]_.
14 Specifically:
15
16 - Flow Control OFF:
17   ::
18
19       $ ethtool -A $netdev rx off tx off
20
21 - Set CQE COMPRESSION to "AGGRESSIVE":
22   ::
23
24       $ mlxconfig -d $PORT_PCI_ADDRESS set CQE_COMPRESSION=1
25
26 Mellanox :abbr:`OFED (OpenFabrics Enterprise Distribution)` driver is installed
27 and used to manage the NIC settings.
28
29 ::
30
31     $ sudo lspci -vvvs 5e:00.0
32     5e:00.0 Ethernet controller: Mellanox Technologies MT28800 Family [ConnectX-5 Ex]
33             Subsystem: Mellanox Technologies MT28800 Family [ConnectX-5 Ex]
34             Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
35             Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
36             Latency: 0, Cache Line Size: 32 bytes
37             Interrupt: pin A routed to IRQ 37
38             NUMA node: 0
39             Region 0: Memory at 38fffe000000 (64-bit, prefetchable) [size=32M]
40             Expansion ROM at c5e00000 [disabled] [size=1M]
41             Capabilities: [60] Express (v2) Endpoint, MSI 00
42                     DevCap:     MaxPayload 512 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
43                             ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
44                     DevCtl:     Report errors: Correctable- Non-Fatal- Fatal+ Unsupported-
45                             RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
46                             MaxPayload 256 bytes, MaxReadReq 4096 bytes
47                     DevSta:     CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
48                     LnkCap:     Port #0, Speed 16GT/s, Width x16, ASPM not supported, Exit Latency L0s unlimited, L1 unlimited
49                             ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
50                     LnkCtl:     ASPM Disabled; RCB 64 bytes Disabled- CommClk+
51                             ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
52                     LnkSta:     Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
53                     DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
54                     DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
55                     LnkCtl2: Target Link Speed: 16GT/s, EnterCompliance- SpeedDis-
56                              Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
57                              Compliance De-emphasis: -6dB
58                     LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+
59                              EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
60             Capabilities: [48] Vital Product Data
61                     Product Name: CX556A - ConnectX-5 QSFP28
62                     Read-only fields:
63                             [PN] Part number: MCX556A-EDAT
64                             [EC] Engineering changes: AA
65                             [V2] Vendor specific: MCX556A-EDAT
66                             [SN] Serial number: MT1945X00360
67                             [V3] Vendor specific: f8d15ef7e701ea118000b8599ffe4aa8
68                             [VA] Vendor specific: MLX:MODL=CX556A:MN=MLNX:CSKU=V2:UUID=V3:PCI=V0
69                             [V0] Vendor specific: PCIeGen4 x16
70                             [RV] Reserved: checksum good, 2 byte(s) reserved
71                     End
72             Capabilities: [9c] MSI-X: Enable+ Count=64 Masked-
73                     Vector table: BAR=0 offset=00002000
74                     PBA: BAR=0 offset=00003000
75             Capabilities: [c0] Vendor Specific Information: Len=18 <?>
76             Capabilities: [40] Power Management version 3
77                     Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold+)
78                     Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
79             Capabilities: [100 v1] Advanced Error Reporting
80                     UESta:      DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
81                     UEMsk:      DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
82                     UESvrt:     DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
83                     CESta:      RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
84                     CEMsk:      RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
85                     AERCap:     First Error Pointer: 04, GenCap+ CGenEn- ChkCap+ ChkEn-
86             Capabilities: [150 v1] Alternative Routing-ID Interpretation (ARI)
87                     ARICap:     MFVC- ACS-, Next Function: 1
88                     ARICtl:     MFVC- ACS-, Function Group: 0
89             Capabilities: [1c0 v1] #19
90             Capabilities: [230 v1] Access Control Services
91                     ACSCap:     SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
92                     ACSCtl:     SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
93             Capabilities: [320 v1] #27
94             Capabilities: [370 v1] #26
95             Capabilities: [420 v1] #25
96             Kernel driver in use: mlx5_core
97             Kernel modules: mlx5_core
98
99 TG and SUT settings
100 ~~~~~~~~~~~~~~~~~~~
101
102 For the TG and SUT environment settings please refer to
103 :ref:`_vpp_test_environment` and :ref:`_dpdk_test_environment`.
104
105 Links
106 ~~~~~
107
108 .. [DpdkPerformanceReport] `DPDK 19.11 performance report <http://static.dpdk.org/doc/perf/DPDK_19_11_Mellanox_NIC_performance_report.pdf>`
109 .. [MellanoxDpdkGuide] `Mellanox DPDK guide <https://www.mellanox.com/related-docs/prod_software/MLNX_DPDK_Quick_Start_Guide_v16.11_3.0.pdf>`
110 .. [MellanoxDpdkBits] `Mellanox DPDK bits <https://community.mellanox.com/s/article/mellanox-dpdk>`