docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst

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   6 IPSec IPv4 Routing
   7 ==================
   8
   9 Following sections include Throughput Speedup Analysis for VPP multi-
  10 core multi-thread configurations with no Hyper-Threading, specifically
  11 for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput
  12 results are used as a reference for reported speedup ratio.
  13 VPP IPSec encryption is accelerated using DPDK cryptodev
  14 library driving Intel Quick Assist (QAT) crypto PCIe hardware cards.
  15 Performance is reported for VPP running in multiple configurations of
  16 VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
  17 physical CPU core(s) placement.
  18
  19 CSIT source code for the test cases used for plots can be found in
  20 `CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls1908>`_.
  21
  22 .. toctree::
  23
  24     ipsec-3n-skx-xxv710
  25     ipsec-3n-hsw-xl710
  26     ipsec-3n-tsh-x520
  27     ipsec-3n-dnv-x553