Report: Configure report

[csit.git] / docs / report / introduction / physical_testbeds.rst

diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst
index 1c6bc1c..5f62f1b 100644 (file)
--- a/docs/report/introduction/physical_testbeds.rst
+++ b/docs/report/introduction/physical_testbeds.rst
@@ -227,54 +227,6 @@ All Intel Xeon Skylake servers run with Intel Hyper-Threading enabled,
 doubling the number of logical cores exposed to Linux, with 56 logical
 cores and 28 physical cores per processor socket.
 
-3-Node Xeon Haswell (3n-hsw)
-----------------------------
-
-Three 3n-hsw testbeds are in operation in FD.io labs. Each 3n-hsw
-testbed is built with three Cisco UCS-c240m3 servers, each in turn
-equipped with two Intel Xeon Haswell-SP E5-2699v3 processors (45 MB
-Cache, 2.3 GHz, 18 cores). 3n-hsw physical topology is shown below.
-
-.. only:: latex
-
-    .. raw:: latex
-
-        \begin{figure}[H]
-            \centering
-                \graphicspath{{../_tmp/src/introduction/}}
-                \includegraphics[width=0.90\textwidth]{testbed-3n-hsw}
-                \label{fig:testbed-3n-hsw}
-        \end{figure}
-
-.. only:: html
-
-    .. figure:: testbed-3n-hsw.svg
-        :alt: testbed-3n-hsw
-        :align: center
-
-SUT1 and SUT2 servers are populated with the following NIC models:
-
-#. NIC-1: VIC 1385 2p40GE Cisco.
-#. NIC-2: NIC x520 2p10GE Intel.
-#. NIC-3: empty.
-#. NIC-4: NIC xl710-QDA2 2p40GE Intel.
-#. NIC-5: NIC x710-DA2 2p10GE Intel.
-#. NIC-6: QAT 8950 50G (Walnut Hill) Intel.
-
-TG servers run T-Rex application and are populated with the following
-NIC models:
-
-#. NIC-1: NIC xl710-QDA2 2p40GE Intel.
-#. NIC-2: NIC x710-DA2 2p10GE Intel.
-#. NIC-3: empty.
-#. NIC-4: NIC xl710-QDA2 2p40GE Intel.
-#. NIC-5: NIC x710-DA2 2p10GE Intel.
-#. NIC-6: NIC x710-DA2 2p10GE Intel. (For self-tests.)
-
-All Intel Xeon Haswell servers run with Intel Hyper-Threading disabled,
-making the number of logical cores exposed to Linux match the number of
-18 physical cores per processor socket.
-
 2-Node Atom Denverton (2n-dnv)
 ------------------------------
 
@@ -386,8 +338,45 @@ SUT1 and SUT2 servers are populated with the following NIC models:
 #. NIC-1: connectx4 2p25GE Mellanox.
 #. NIC-2: x520 2p10GE Intel.
 
-TG servers run T-Rex application and are populated with the following
+TG server runs T-Rex application and is populated with the following
 NIC models:
 
 #. NIC-1: x710-DA4 4p10GE Intel.
 #. NIC-2: xxv710-DA2 2p25GE Intel.
+#. NIC-3: xl710-QDA2 2p40GE Intel.
+
+2-Node ARM ThunderX2 (2n-tx2)
+---------------------------
+
+One 2n-tx2 testbed is built with: i) one SuperMicro SYS-7049GP-TRT
+server acting as TG and equipped with two Intel Xeon Skylake Platinum
+8180 processors (38.5 MB Cache, 2.50 GHz, 28 cores), and ii) one Marvell
+ThnderX2 9975 (28* ThunderX2) server acting as SUT and equipped with two
+ThunderX2 ARMv8 CN9975 processors. 2n-tx2 physical topology is shown below.
+
+.. only:: latex
+
+    .. raw:: latex
+
+        \begin{figure}[H]
+            \centering
+                \graphicspath{{../_tmp/src/introduction/}}
+                \includegraphics[width=0.90\textwidth]{testbed-2n-tx2}
+                \label{fig:testbed-2n-tx2}
+        \end{figure}
+
+.. only:: html
+
+    .. figure:: testbed-2n-tx2.svg
+        :alt: testbed-2n-tx2
+        :align: center
+
+SUT server is populated with the following NIC models:
+
+#. NIC-1: xl710-QDA2 2p40GE Intel (not connected).
+#. NIC-2: xl710-QDA2 2p40GE Intel.
+
+TG server run T-Rex application and is populated with the following
+NIC models:
+
+#. NIC-1: xl710-QDA2 2p40GE Intel.