lab: update Arm lab docs

[csit.git] / docs / report / introduction / test_environment_sut_calib_tsh.rst

diff --git a/docs/report/introduction/test_environment_sut_calib_tsh.rst b/docs/report/introduction/test_environment_sut_calib_tsh.rst
index 139d30f..36284f3 100644 (file)
--- a/docs/report/introduction/test_environment_sut_calib_tsh.rst
+++ b/docs/report/introduction/test_environment_sut_calib_tsh.rst
@@ -1,5 +1,5 @@
-Calibration Data - TaiShan
---------------------------
+TaiShan
+~~~~~~~
 
 Following sections include sample calibration data measured on
 s17-t33-sut1 server running in one of the Cortex-A72 testbeds.
@@ -9,24 +9,24 @@ same or similar values.
 
 
 Linux cmdline
-~~~~~~~~~~~~~
+^^^^^^^^^^^^^
 
 ::
 
     $ cat /proc/cmdline
-    BOOT_IMAGE=/boot/vmlinuz-4.15.0-54-generic root=/dev/mapper/huawei--1--vg-root ro isolcpus=1-15,17-31,33-47,49-63 nohz_full=1-15     17-31,33-47,49-63 rcu_nocbs=1-15     17-31,33-47,49-63 intel_iommu=on nmi_watchdog=0 audit=0 nosoftlockup processor.max_cstate=1 console=ttyAMA0,115200n8
+    BOOT_IMAGE=/boot/vmlinuz-5.4.0-65-generic root=UUID=7d1d0e77-4df0-43df-9619-a99db29ffb83 ro audit=0 intel_iommu=on isolcpus=1-27,29-55 nmi_watchdog=0 nohz_full=1-27,29-55 nosoftlockup processor.max_cstate=1 rcu_nocbs=1-27,29-55 console=ttyAMA0,115200n8 quiet
 
 Linux uname
-~~~~~~~~~~~
+^^^^^^^^^^^
 
 ::
 
     $ uname -a
-    Linux s17-t33-sut1 4.15.0-54-generic #58-Ubuntu SMP Mon Jun 24 10:56:40 UTC 2019 aarch64 aarch64 aarch64 GNU/Linux
+    Linux 5.4.0-65-generic #73-Ubuntu SMP Mon Jan 18 17:25:17 UTC 2021 x86_64 x86_64 x86_64 GNU/Linux
 
 
 System-level Core Jitter
-~~~~~~~~~~~~~~~~~~~~~~~~
+^^^^^^^^^^^^^^^^^^^^^^^^
 
 ::
 
@@ -78,3 +78,5 @@ System-level Core Jitter
         160022     169610       9588     160044     160022     173162    2580611072 3204390608         28
         160022     169254       9232     160044     160022     173162    1492189184 3204399760         29
         160022     169386       9364     160046     160022     173162     403767296 3204417762         30
+
+.. include:: ../introduction/test_environment_sut_meltspec_tsh.rst