Report: Add 2n-clx

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / container_memif.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
index 2c8a4ba..3ad329f 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/container_memif.rst
@@ -13,10 +13,11 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
 physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2001>`_.
 
 .. toctree::
 
     container_memif-2n-skx-xxv710
     container_memif-3n-skx-xxv710
+    container_memif-2n-clx-xxv710
     container_memif-3n-tsh-x520