Report: Add 2n-clx

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / ip4.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
index 23c19de..894f997 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ip4.rst
@@ -13,7 +13,7 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
 physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls2001>`_.
 
 .. toctree::
 
@@ -21,5 +21,7 @@ CSIT source code for the test cases used for plots can be found in
     ip4-2n-skx-x710
     ip4-3n-skx-xxv710
     ip4-3n-skx-x710
+    ip4-2n-clx-xxv710
+    ip4-2n-clx-x710
     ip4-3n-hsw-xl710
     ip4-3n-tsh-x520