Report: Add 2n-clx

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / vm_vhost.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
index 9545739..1df8819 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
@@ -14,12 +14,13 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s)
 placement.
 
 CSIT source code for the test cases used for plots can be found in
 placement.
 
 CSIT source code for the test cases used for plots can be found in

-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vm_vhost?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vm_vhost?h=rls2001>`_.

 
 .. toctree::
 
     vm_vhost-2n-skx-xxv710
     vm_vhost-3n-skx-xxv710
     vm_vhost-3n-skx-x710
 
 .. toctree::
 
     vm_vhost-2n-skx-xxv710
     vm_vhost-3n-skx-xxv710
     vm_vhost-3n-skx-x710

+    vm_vhost-2n-clx-xxv710

     vm_vhost-3n-hsw-xl710
     vm_vhost-3n-tsh-x520
     vm_vhost-3n-hsw-xl710
     vm_vhost-3n-tsh-x520