CSIT-1489: Change graphs to display results by suite generator

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / vm_vhost.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
index fb80d49..eff6469 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vm_vhost.rst
@@ -14,7 +14,7 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s)
 placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vm_vhost?h=rls1810>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vm_vhost?h=rls1901>`_.
 
 .. toctree::
 
@@ -22,4 +22,6 @@ CSIT source code for the test cases used for plots can be found in
     vm_vhost-3n-hsw-x710
     vm_vhost-3n-skx-x710
     vm_vhost-2n-skx-x710
+
+..
     vm_vhost-2n-skx-xxv710