Report: Add 2n-clx

[csit.git] / docs / report / vpp_performance_tests / packet_latency_graphs / vts.rst

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
index 8a4c27e..6e47279 100644 (file)
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/vts.rst
@@ -14,7 +14,7 @@ a.k.a. VPP data plane thread(s), and their physical CPU core(s)
 placement.
 
 CSIT source code for the test cases used for plots can be found in
 placement.
 
 CSIT source code for the test cases used for plots can be found in

-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls1908>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/vts?h=rls2001>`_.

 
 .. toctree::
 
 
 .. toctree::