Report: Add 3n-snr dpdk tests

[csit.git] / docs / report / vpp_performance_tests / throughput_speedup_multi_core / container_memif.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst
index a8b6c0c..ad74dd2 100644 (file)
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_memif.rst
@@ -15,7 +15,7 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2206>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/container_memif?h=rls2210>`_.
 
 .. toctree::