Oper: TB31 back in operation

[csit.git] / docs / report / vpp_performance_tests / throughput_speedup_multi_core / container_orchestrated.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_orchestrated.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_orchestrated.rst
index 418a158..dd023dd 100644 (file)
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_orchestrated.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/container_orchestrated.rst
@@ -15,116 +15,9 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/kubernetes/perf/container_memif?h=rls1807>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/kubernetes/perf/container_memif?h=rls1901>`_.
 
-3n-hsw-x520
-~~~~~~~~~~~
+.. toctree::
 
-64b-base_and_scale
-------------------
-
-.. raw:: html
-
-    <center><b>
-
-:index:`Speedup: k8s-memif-3n-hsw-x520-64b-base_and_scale-ndr`
-
-.. raw:: html
-
-    </b>
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/k8s-memif-3n-hsw-x520-64b-base_and_scale-ndr-tsa.html"></iframe>
-    <p><br><br></p>
-    </center>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{k8s-memif-3n-hsw-x520-64b-base_and_scale-ndr-tsa}
-            \label{fig:k8s-memif-3n-hsw-x520-64b-base_and_scale-ndr-tsa}
-    \end{figure}
-
-.. raw:: html
-
-    <center><b>
-
-.. raw:: latex
-
-    \clearpage
-
-:index:`Speedup: k8s-memif-3n-hsw-x520-64b-base_and_scale-pdr`
-
-.. raw:: html
-
-    </b>
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/k8s-memif-3n-hsw-x520-64b-base_and_scale-pdr-tsa.html"></iframe>
-    <p><br><br></p>
-    </center>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{k8s-memif-3n-hsw-x520-64b-base_and_scale-pdr-tsa}
-            \label{fig:k8s-memif-3n-hsw-x520-64b-base_and_scale-pdr-tsa}
-    \end{figure}
-
-.. raw:: latex
-
-    \clearpage
-
-3n-hsw-x710
-~~~~~~~~~~~
-
-64b-base_and_scale
-------------------
-
-.. raw:: html
-
-    <center><b>
-
-:index:`Speedup: k8s-memif-3n-hsw-x710-64b-base_and_scale-ndr`
-
-.. raw:: html
-
-    </b>
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/k8s-memif-3n-hsw-x710-64b-base_and_scale-ndr-tsa.html"></iframe>
-    <p><br><br></p>
-    </center>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{k8s-memif-3n-hsw-x710-64b-base_and_scale-ndr-tsa}
-            \label{fig:k8s-memif-3n-hsw-x710-64b-base_and_scale-ndr-tsa}
-    \end{figure}
-
-.. raw:: html
-
-    <center><b>
-
-.. raw:: latex
-
-    \clearpage
-
-:index:`Speedup: k8s-memif-3n-hsw-x710-64b-base_and_scale-pdr`
-
-.. raw:: html
-
-    </b>
-    <iframe width="700" height="1000" frameborder="0" scrolling="no" src="../../_static/vpp/k8s-memif-3n-hsw-x710-64b-base_and_scale-pdr-tsa.html"></iframe>
-    <p><br><br></p>
-    </center>
-
-.. raw:: latex
-
-    \begin{figure}[H]
-        \centering
-            \graphicspath{{../_build/_static/vpp/}}
-            \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{k8s-memif-3n-hsw-x710-64b-base_and_scale-pdr-tsa}
-            \label{fig:k8s-memif-3n-hsw-x710-64b-base_and_scale-pdr-tsa}
-    \end{figure}
+    container_orchestrated-3n-hsw-x520
+    container_orchestrated-3n-hsw-x710