Report: Add GENEVE tests

[csit.git] / docs / report / vpp_performance_tests / throughput_speedup_multi_core / ip4_tunnels.rst

diff --git a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
index d37a44f..3870b02 100644 (file)
--- a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
+++ b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ip4_tunnels.rst
@@ -15,10 +15,13 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls2001>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4_tunnels?h=rls2101>`_.
 
 .. toctree::
 
+    ip4_tunnels-2n-skx-xxv710
+    ip4_tunnels-2n-clx-xxv710
+    ip4_tunnels-2n-zn2-xxv710
     ip4_tunnels-3n-skx-xxv710
     ip4_tunnels-3n-hsw-xl710
     ip4_tunnels-3n-tsh-x520