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Report: configure rls2110
[csit.git]
/
docs
/
report
/
vpp_performance_tests
/
throughput_speedup_multi_core
/
ipsec.rst
diff --git
a/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst
b/docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst
index
75a9322
..
957e705
100644
(file)
--- a/
docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst
+++ b/
docs/report/vpp_performance_tests/throughput_speedup_multi_core/ipsec.rst
@@
-17,7
+17,7
@@
VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
physical CPU core(s) placement.
CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls21
06
>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/crypto?h=rls21
10
>`_.
.. toctree::
.. toctree::