CSIT-1097: Migrate L2 to NDRPDR and edit MRR

[csit.git] / tests / vpp / perf / l2 / 25ge2p1xxv710-eth-l2patch-mrr.robot

diff --git a/tests/vpp/perf/l2/25ge2p1xxv710-eth-l2patch-mrr.robot b/tests/vpp/perf/l2/25ge2p1xxv710-eth-l2patch-mrr.robot
index b56d92f..d0c20df 100644 (file)
--- a/tests/vpp/perf/l2/25ge2p1xxv710-eth-l2patch-mrr.robot
+++ b/tests/vpp/perf/l2/25ge2p1xxv710-eth-l2patch-mrr.robot
@@ -19,13 +19,14 @@
 | ...
 | Suite Setup | Set up 3-node performance topology with DUT's NIC model
 | ... | L2 | Intel-XXV710
+| ...
 | Suite Teardown | Tear down 3-node performance topology
 | ...
 | Test Setup | Set up performance test
 | ...
 | Test Teardown | Tear down performance mrr test
 | ...
-| Test Template | Local template
+| Test Template | Local Template
 | ...
 | Documentation | *Raw results L2patch test cases*
 | ...
@@ -44,15 +45,15 @@
 | ... | interfaces.
 
 *** Variables ***
-# XXV710-DA2 bandwidth limit ~50Gbps/2=25Gbps
-| ${s_25G} | ${25000000000}
+# XXV710-DA2 bandwidth limit ~49Gbps/2=24.5Gbps
+| ${s_24.5G} | ${24500000000}
 # XXV710-DA2 Mpps limit 37.5Mpps/2=18.75Mpps
 | ${s_18.75Mpps} | ${18750000}
 # Traffic profile:
 | ${traffic_profile} | trex-sl-3n-ethip4-ip4src254
 
 *** Keywords ***
-| Local template
+| Local Template
 | | [Documentation]
 | | ... | [Cfg] DUT runs L2 patch config with ${phy_cores} phy
 | | ... | core(s).
@@ -70,7 +71,7 @@
 | | Given Add worker threads and rxqueues to all DUTs | ${phy_cores} | ${rxq}
 | | And Add PCI devices to all DUTs
 | | ${max_rate} | ${jumbo} = | Get Max Rate And Jumbo And Handle Multi Seg
-| | ... | ${s_25G} | ${framesize} | pps_limit=${s_18.75Mpps}
+| | ... | ${s_24.5G} | ${framesize} | pps_limit=${s_18.75Mpps}
 | | And Add DPDK dev default RXD to all DUTs | 2048
 | | And Add DPDK dev default TXD to all DUTs | 2048
 | | And Apply startup configuration on all VPP DUTs
@@ -83,46 +84,46 @@
 | | [Tags] | 64B | 1C
 | | framesize=${64} | phy_cores=${1}
 
-| tc02-1518B-1c-eth-l2patch-mrr
-| | [Tags] | 1518B | 1C
-| | framesize=${1518} | phy_cores=${1}
-
-| tc03-9000B-1c-eth-l2patch-mrr
-| | [Tags] | 9000B | 1C
-| | framesize=${9000} | phy_cores=${1}
-
-| tc04-IMIX-1c-eth-l2patch-mrr
-| | [Tags] | IMIX | 1C
-| | framesize=IMIX_v4_1 | phy_cores=${1}
-
-| tc05-64B-2c-eth-l2patch-mrr
+| tc02-64B-2c-eth-l2patch-mrr
 | | [Tags] | 64B | 2C
 | | framesize=${64} | phy_cores=${2}
 
-| tc06-1518B-2c-eth-l2patch-mrr
-| | [Tags] | 1518B | 2C
-| | framesize=${1518} | phy_cores=${2}
-
-| tc07-9000B-2c-eth-l2patch-mrr
-| | [Tags] | 9000B | 2C
-| | framesize=${9000} | phy_cores=${2}
-
-| tc08-IMIX-2c-eth-l2patch-mrr
-| | [Tags] | IMIX | 2C
-| | framesize=IMIX_v4_1 | phy_cores=${2}
-
-| tc09-64B-4c-eth-l2patch-mrr
+| tc03-64B-4c-eth-l2patch-mrr
 | | [Tags] | 64B | 4C
 | | framesize=${64} | phy_cores=${4}
 
-| tc10-1518B-4c-eth-l2patch-mrr
+| tc04-1518B-1c-eth-l2patch-mrr
+| | [Tags] | 1518B | 1C
+| | framesize=${1518} | phy_cores=${1}
+
+| tc05-1518B-2c-eth-l2patch-mrr
+| | [Tags] | 1518B | 2C
+| | framesize=${1518} | phy_cores=${2}
+
+| tc06-1518B-4c-eth-l2patch-mrr
 | | [Tags] | 1518B | 4C
 | | framesize=${1518} | phy_cores=${4}
 
-| tc11-9000B-4c-eth-l2patch-mrr
+| tc07-9000B-1c-eth-l2patch-mrr
+| | [Tags] | 9000B | 1C
+| | framesize=${9000} | phy_cores=${1}
+
+| tc08-9000B-2c-eth-l2patch-mrr
+| | [Tags] | 9000B | 2C
+| | framesize=${9000} | phy_cores=${2}
+
+| tc09-9000B-4c-eth-l2patch-mrr
 | | [Tags] | 9000B | 4C
 | | framesize=${9000} | phy_cores=${4}
 
+| tc10-IMIX-1c-eth-l2patch-mrr
+| | [Tags] | IMIX | 1C
+| | framesize=IMIX_v4_1 | phy_cores=${1}
+
+| tc11-IMIX-2c-eth-l2patch-mrr
+| | [Tags] | IMIX | 2C
+| | framesize=IMIX_v4_1 | phy_cores=${2}
+
 | tc12-IMIX-4c-eth-l2patch-mrr
 | | [Tags] | IMIX | 4C
 | | framesize=IMIX_v4_1 | phy_cores=${4}