feat(core): QAT initialization refactor

[csit.git] / topologies / available / lf_3na_spr_testbed21.yaml

diff --git a/topologies/available/lf_3na_spr_testbed21.yaml b/topologies/available/lf_3na_spr_testbed21.yaml
index 73dc9ba..1167ab0 100644 (file)
--- a/topologies/available/lf_3na_spr_testbed21.yaml
+++ b/topologies/available/lf_3na_spr_testbed21.yaml
@@ -24,7 +24,19 @@ nodes:
         pci_address: "0000:f2:01.0"
         driver: idxd
         model: Intel-DSA
-    cryptodev: "0000:76:00.0"
+    cryptodev:
+      device1:
+        pci_address: "0000:76:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
+      device2:
+        pci_address: "0000:7a:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
     interfaces:
       port1:
         # s53-t21-tg1-c4/p1 - 200GE port1 Mellanox ConnectX7-2p200GE.
@@ -107,7 +119,19 @@ nodes:
         pci_address: "0000:f2:01.0"
         driver: idxd
         model: Intel-DSA
-    cryptodev: "0000:76:00.0"
+    cryptodev:
+      device1:
+        pci_address: "0000:76:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
+      device2:
+        pci_address: "0000:7a:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
     interfaces:
       port1:
         # s52-t21-sut1-c4/p1 - 200GE port1 Mellanox ConnectX7-2p200GE.
@@ -174,7 +198,19 @@ nodes:
         pci_address: "0000:f2:01.0"
         driver: idxd
         model: Intel-DSA
-    cryptodev: "0000:f3:00.0"
+    cryptodev:
+      device1:
+        pci_address: "0000:f3:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
+      device2:
+        pci_address: "0000:f7:00.0"
+        driver: "4xxx"
+        model: "HW_4xxx"
+        module: "qat_4xxx"
+        numvfs: 8
     interfaces:
       port1:
         # s52-t21-sut2-c9/p1 - 200GE port1 Mellanox ConnectX7-2p200GE.