X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fdpdk_performance_tests%2Fpacket_latency_graphs%2Fip4.rst;h=8f5b8072404e18f20f37e9a7f2848335d14941d1;hp=9dd2add5aafe856cdf0af6eb2380e8dfb7078c5e;hb=b641b5bf12a0d1b63ac9afb7c89133297d3b63fe;hpb=8243ea78854683f2f80da53d8f197f10316e4801

diff --git a/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst b/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst
index 9dd2add5aa..8f5b807240 100644
--- a/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst
+++ b/docs/report/dpdk_performance_tests/packet_latency_graphs/ip4.rst
@@ -39,6 +39,10 @@ a.k.a. L3FWD data plane thread(s), and their physical CPU core(s) placement.
 CSIT source code for the test cases used for plots can be found in
 `CSIT git repository <https://git.fd.io/csit/tree/tests/dpdk/perf?h=rls1810>`_.
 
+.. raw:: latex
+
+    \clearpage
+
 3n-hsw-x520
 ~~~~~~~~~~~