X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Fphysical_testbeds.rst;h=d265efda038e12d247e62e234977c844bd49d5e9;hp=60b06e68dc579a17bc0610aa645699f37e4f2552;hb=38c3ff73f5cbc0124782c7c7d235ba36f57872ae;hpb=61d020ed404923283dcd87424a7845dcd84bd66a diff --git a/docs/report/introduction/physical_testbeds.rst b/docs/report/introduction/physical_testbeds.rst index 60b06e68dc..d265efda03 100644 --- a/docs/report/introduction/physical_testbeds.rst +++ b/docs/report/introduction/physical_testbeds.rst @@ -26,18 +26,11 @@ Two physical server topology types are used: Current FD.io production testbeds are built with SUT servers based on the following processor architectures: -- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, (Icelake 8358 - to be added). +- Intel Xeon: Skylake Platinum 8180, Cascadelake 6252N, Icelake 8358. - Intel Atom: Denverton C3858. - Arm: TaiShan 2280, hip07-d05. - AMD EPYC: Zen2 7532. -CSIT-2106 report data for Intel Xeon Icelake testbeds comes from -testbeds in Intel labs set up per CSIT specification and running CSIT -code. Physical setup used is specified in 2n-icx and 3n-icx sections -below. For details about tested VPP and CSIT versions -see :ref:`vpp_performance_tests_release_notes`. - Server SUT performance depends on server and processor type, hence results for testbeds based on different servers must be reported separately, and compared if appropriate. @@ -53,7 +46,7 @@ SUT and TG servers are equipped with a number of different NIC models. VPP is performance tested on SUTs with the following NICs and drivers: -#. 2p10GE: x520, x550, x553 Intel (codename Niantic) +#. 2p10GE: x550, x553 Intel (codename Niantic) - DPDK Poll Mode Driver (PMD). #. 4p10GE: x710-DA4 Intel (codename Fortville, FVL) - DPDK PMD. @@ -121,7 +114,7 @@ All AMD EPYC Zen2 7532 servers run with AMD SMT enabled, doubling the number of logical cores exposed to Linux. 2-Node Xeon Cascadelake (2n-clx) ---------------------------------- +-------------------------------- Three 2n-clx testbeds are in operation in FD.io labs. Each 2n-clx testbed is built with two SuperMicro SYS-7049GP-TRT servers, SUTs are equipped with two @@ -167,15 +160,14 @@ TG NICs: All Intel Xeon Cascadelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. -2-Node Xeon Icelake (2n-icx) EXPERIMENTAL ------------------------------------------ +.. _physical_testbeds_2n_icx: + +2-Node Xeon Icelake (2n-icx) +---------------------------- -One 2n-icx testbed located in Intel labs was used for CSIT testing. It -is built with two SuperMicro SYS-740GP-TNRT servers. SUT is equipped -with two Intel Xeon Gold 6338N processors (48 MB Cache, 2.20 GHz, 32 -cores). TG is equiped with two Intel Xeon Ice Lake Platinum 8360Y -processors (54 MB Cache, 2.40 GHz, 36 cores). 2n-icx physical topology -is shown below. +One 2n-icx testbed is in operation in FD.io labs. It is built with two +SuperMicro SYS-740GP-TNRT servers, each in turn equipped with two Intel Xeon +Platinum 8358 processors (48 MB Cache, 2.60 GHz, 32 cores). .. only:: latex @@ -196,20 +188,21 @@ is shown below. SUT and TG NICs: -#. NIC-1: E810-2CQDA2 2p100GbE Intel. +#. NIC-1: xxv710-DA2 2p25GE Intel. +#. NIC-2: E810-2CQDA2 2p100GbE Intel (* to be added). +#. NIC-3: E810-CQDA4 4p100GbE Intel (* to be added). All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. -3-Node Xeon Icelake (3n-icx) EXPERIMENTAL ------------------------------------------ +.. _physical_testbeds_3n_icx: + +3-Node Xeon Icelake (3n-icx) +---------------------------- -One 3n-icx testbed located in Intel labs was used for CSIT testing. It -is built with three SuperMicro SYS-740GP-TNRT servers. SUTs are -equipped each with two Intel Xeon Platinum 8360Y processors (54 MB -Cache, 2.40 GHz, 36 cores). TG is equiped with two Intel Xeon Ice Lake -Platinum 8360Y processors (54 MB Cache, 2.40 GHz, 36 cores). 3n-icx -physical topology is shown below. +One 3n-icx testbed is in operation in FD.io labs. It is built with three +SuperMicro SYS-740GP-TNRT servers, each in turn equipped with two Intel Xeon +Platinum 8358 processors (48 MB Cache, 2.60 GHz, 32 cores). .. only:: latex @@ -230,7 +223,9 @@ physical topology is shown below. SUT and TG NICs: -#. NIC-1: E810-2CQDA2 2p100GbE Intel. +#. NIC-1: xxv710-DA2 2p25GE Intel. +#. NIC-2: E810-2CQDA2 2p100GbE Intel (* to be added). +#. NIC-3: E810-CQDA4 4p100GbE Intel (* to be added). All Intel Xeon Icelake servers run with Intel Hyper-Threading enabled, doubling the number of logical cores exposed to Linux. @@ -407,6 +402,45 @@ TG NICs: #. NIC-1: x710-DA4 4p10GE Intel. +.. _physical_testbeds_3n_alt: + +3-Node ARM Altra (3n-alt) +--------------------------- + +One 3n-tsh testbed is built with: i) one SuperMicro SYS-740GP-TNRT +server acting as TG and equipped with two Intel Xeon Icelake Platinum +8358 processors (80 MB Cache, 2.60 GHz, 32 cores), and ii) one Ampere +Altra server acting as SUT and equipped with two Q80-30 processors +(80* ARM Neoverse N1). 3n-alt physical topology is shown below. + +.. only:: latex + + .. raw:: latex + + \begin{figure}[H] + \centering + \graphicspath{{../_tmp/src/introduction/}} + \includegraphics[width=0.90\textwidth]{testbed-3n-alt} + \label{fig:testbed-3n-alt} + \end{figure} + +.. only:: html + + .. figure:: testbed-3n-alt.svg + :alt: testbed-3n-alt + :align: center + +SUT1 and SUT2 NICs: + +#. NIC-1: xl710-QDA2-2p40GE Intel. + +TG NICs: + +#. NIC-1: xxv710-DA2-2p25GE Intel. +#. NIC-2: xl710-QDA2-2p40GE Intel. +#. NIC-3: e810-XXVDA4-4p25GE Intel. +#. NIC-4: e810-2CQDA2-2p100GE Intel. + 3-Node ARM TaiShan (3n-tsh) --------------------------- @@ -445,7 +479,7 @@ TG NICs: #. NIC-3: xl710-QDA2 2p40GE Intel. 2-Node ARM ThunderX2 (2n-tx2) ---------------------------- +----------------------------- One 2n-tx2 testbed is built with: i) one SuperMicro SYS-7049GP-TRT server acting as TG and equipped with two Intel Xeon Skylake Platinum