X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Ftest_environment_intro.rst;h=b02520b99da10c4fd5d00c593c87e6ba867e6591;hp=7763e9df8b07dc14646e4235120d2c7f76c8a824;hb=c5e84fbee876a45d3495cde6f4e2d8140cacbe5a;hpb=5a1f4570778a7511415d94e58cc2299d02b871cd

diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst
index 7763e9df8b..b02520b99d 100644
--- a/docs/report/introduction/test_environment_intro.rst
+++ b/docs/report/introduction/test_environment_intro.rst
@@ -1,5 +1,3 @@
-.. _test_environment:
-
 Test Environment
 ================
 
@@ -17,8 +15,8 @@ topology types are used:
   server as TG both connected in ring topology.
 
 Tested SUT servers are based on a range of processors including Intel
-Xeon Haswell-SP, Intel Xeon Skylake-SP, Arm, Intel Atom. More detailed
-description is provided in
+Xeon Haswell-SP, Intel Xeon Skylake-SP, Intel Xeon Cascadelake-SP, Arm, Intel
+Atom. More detailed description is provided in
 :ref:`tested_physical_topologies`. Tested logical topologies are
 described in :ref:`tested_logical_topologies`.
 
@@ -26,11 +24,10 @@ Server Specifications
 ---------------------
 
 Complete technical specifications of compute servers used in CSIT
-physical testbeds are maintained on FD.io wiki pages: `CSIT/Testbeds:
-Xeon Hsw, VIRL
-<https://wiki.fd.io/view/CSIT/Testbeds:_Xeon_Hsw,_VIRL.#FD.io_CSIT_testbeds_-_Xeon_Haswell.2C_VIRL>`_
-and `CSIT Testbeds: Xeon Skx, Arm, Atom
-<https://wiki.fd.io/view/CSIT/Testbeds:_Xeon_Skx,_Arm,_Atom.#Server_Specification>`_.
+physical testbeds are maintained in FD.io CSIT repository:
+`FD.io CSIT testbeds - Xeon Cascadelake`_,
+`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and
+`FD.io CSIT Testbeds - Xeon Haswell`_.
 
 Pre-Test Server Calibration
 ---------------------------
@@ -57,5 +54,4 @@ repeatable zero packet loss throughput measurements across multiple
 system instances. Generally they come useful as a background data for
 comparing data plane performance results across disparate servers.
 
-Following sections include measured calibration data for Intel Xeon
-Haswell and Intel Xeon Skylake testbeds.
+Following sections include measured calibration data for testbeds.