X-Git-Url: https://gerrit.fd.io/r/gitweb?p=csit.git;a=blobdiff_plain;f=docs%2Freport%2Fintroduction%2Ftest_environment_intro.rst;h=c1ab7ea6ad8569d35f27ce30864556336ab4646a;hp=2aa4f44e405acd773d5b234bcca5f7d10a37375a;hb=2072a56eeca53f00cff1b5d888d24f7271ae1fb4;hpb=6726e389d87ebd601a4f4d083833c9f04f573d75 diff --git a/docs/report/introduction/test_environment_intro.rst b/docs/report/introduction/test_environment_intro.rst index 2aa4f44e40..c1ab7ea6ad 100644 --- a/docs/report/introduction/test_environment_intro.rst +++ b/docs/report/introduction/test_environment_intro.rst @@ -79,7 +79,17 @@ Following is the list of CSIT versions to date: - The main change is TRex version upgrade: `increase from 2.82 to 2.86 `_. +- Ver. 7 associated with CSIT rls2106 branch (`HW + `_, `Linux + `_, + `TRex + `_, + `CSIT `_). + - TRex version upgrade: + `increase from 2.86 to 2.88 `_. + - Ubuntu upgrade: + `upgrade from 18.04 LTS to 20.04.2 LTS `_. To identify performance changes due to VPP code development between previous and current VPP release version, both have been tested in CSIT environment of @@ -101,7 +111,7 @@ topology types are used: server as TG both connected in ring topology. Tested SUT servers are based on a range of processors including Intel -Xeon Haswell-SP, Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm, +Intel Xeon Skylake-SP, Intel Xeon Cascade Lake-SP, Arm, Intel Atom. More detailed description is provided in :ref:`tested_physical_topologies`. Tested logical topologies are described in :ref:`tested_logical_topologies`. @@ -112,5 +122,4 @@ Server Specifications Complete technical specifications of compute servers used in CSIT physical testbeds are maintained in FD.io CSIT repository: `FD.io CSIT testbeds - Xeon Cascade Lake`_, -`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_ and -`FD.io CSIT Testbeds - Xeon Haswell`_. +`FD.io CSIT testbeds - Xeon Skylake, Arm, Atom`_. \ No newline at end of file